coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-07-27	drivers/intel/fsp2_0: Update MRC cache with dead version in recovery	Furquan Shaikh
2016-07-27	soc/intel/common: Store MRC data in next available slot in the cache	Furquan Shaikh
2016-07-27	mainboard/google/slippy: remove unobtainable mainboard	Aaron Durbin
2016-07-27	mainboard/google/bolt: remove unobtainable mainboard	Aaron Durbin
2016-07-27	soc/intel/apollolake: Disable monitor mwait	Bora Guvendik
2016-07-27	Rename VB_SOURCE to VBOOT_SOURCE for increased clarity	Paul Kocialkowski
2016-07-27	chromeec: Use CHROMEEC_SOURCE with fallback instead of hardcoding path	Paul Kocialkowski
2016-07-27	arch/x86: Add bootblock and postcar support for SOC MTRR access	Lee Leahy
2016-07-27	cpu/x86: Support CPUs without rdmsr/wrmsr instructions	Lee Leahy
2016-07-27	nb/intel/x4x: Fix CAS latency detection and max memory detection	Damien Zammit
2016-07-27	device: include devicetree in bootblock stage	Aaron Durbin
2016-07-27	soc/nvidia/tegra124: remove cache_policiy option	Aaron Durbin
2016-07-26	drivers/intel/fsp2_0/header_util: Convert UPD headers	Lee Leahy
2016-07-26	google/oak: dsi: set mipi pin driving control on	Martin Roth
2016-07-26	meditek/mt8173: dsi: set mipi pin driving control on	Jitao Shi
2016-07-26	arch/x86: Generate a map file for the postcar stage	Lee Leahy
2016-07-26	arch/x86: Organize ramstage to match other stages	Lee Leahy
2016-07-26	arch/x86: Move romstage files into romstage section	Lee Leahy
2016-07-26	arch/x86: Move postcar stage commands into place	Lee Leahy
2016-07-26	drivers/elog: put back 4KiB limit	Aaron Durbin
2016-07-26	intel car: Use MTRR WRPROT type for XIP cache	Kyösti Mälkki
2016-07-26	intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE	Kyösti Mälkki
2016-07-26	lib: Don't require ULZMA compression for postcar	Lee Leahy
2016-07-26	drivers/intel/fsp2_0: Enable XIP romstage with loaded FSP-M	Lee Leahy
2016-07-26	src/lib: Enable display of cbmem during romstage and postcar	Lee Leahy
2016-07-25	drivers/uart: Enable debug serial output during postcar	Lee Leahy
2016-07-25	intel/skylake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT	Furquan Shaikh
2016-07-25	intel/apollolake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT	Furquan Shaikh
2016-07-25	rockchip/rk3399: set CA drive strength to 48ohms	Lin Huang
2016-07-25	google/gru: Change UART _Static_assert() condition to #if	Julius Werner
2016-07-25	google/chromeos: Add support for saving recovery reason across reboot	Furquan Shaikh
2016-07-25	google/gale: Fix board ID and GPIO config.	Kan Yan
2016-07-25	lib/bootmode: Use newly-add recovery module	Furquan Shaikh
2016-07-25	google/chromeos: Add recovery module in vboot2	Furquan Shaikh
2016-07-25	vboot: Clean up vboot code	Furquan Shaikh
2016-07-25	skylake: Move CHROMEOS config to SoC	Furquan Shaikh
2016-07-25	apollolake: Move CHROMEOS config to SoC	Furquan Shaikh
2016-07-25	intel/amenia: Add chromeos.c to verstage	Furquan Shaikh
2016-07-25	google/jecht: Increase RO coreboot size on flash	Daisuke Nojiri
2016-07-24	Makefile: Add uCode binary to FIT	Subrata Banik
2016-07-24	google/reef: Enable PS/2 keyboard driver by default	Duncan Laurie
2016-07-24	soc/intel/apollolake: ensure usb port 0 is in host mode	Aaron Durbin
2016-07-24	drivers/elog: remove elog Kconfig variables	Aaron Durbin
2016-07-23	intel/haswell: Remove useless MTRR clear	Kyösti Mälkki
2016-07-23	intel/haswell post-car: Minor fix on MTRR setting	Kyösti Mälkki
2016-07-23	intel/haswell: Add asmlinkage for romstage_after_car()	Kyösti Mälkki
2016-07-22	cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundary	Aaron Durbin
2016-07-22	intel/amenia: Write protect GPIO relative to bank offset	sselvar2
2016-07-22	soc/intel/apollolake: Correct the gpio bank irq	Jagadish Krishnamoorthy
2016-07-22	amd/agesa/f16kb: Allow SATA Gen3	Fabian Kunkel