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AgeCommit message (Expand)Author
2020-08-04nb/intel/i945: Refactor `get_pcie_bar`Angel Pons
2020-08-04nb/intel/haswell: Use ASL 2.0 syntaxAngel Pons
2020-08-04sb/intel/i82801gx: Use PCI bitwise opsAngel Pons
2020-08-04nb/intel/ironlake/acpi/hostbridge.asl: Use ASL 2.0 syntaxAngel Pons
2020-08-04nb/intel/sandybridge: Update to ASL 2.0 syntaxAngel Pons
2020-08-04nb/intel/x4x: Change signature of `decode_pciebar`Angel Pons
2020-08-04nb/intel/haswell: Deduplicate PCIEXBAR decodingAngel Pons
2020-08-04nb/intel/pineview: Refactor `decode_pcie_bar`Angel Pons
2020-08-04nb/intel/pineview: Change signature of `decode_pciebar`Angel Pons
2020-08-04nb/intel/pineview: Use `MiB` definitionAngel Pons
2020-08-04mb/google/zork/var/vilboz: Enable support for garaged stylusFurquan Shaikh
2020-08-04mb/kontron/bsl6: Add new Skylake COMe moduleNico Huber
2020-08-04soc/intel/baytrail: Factor out `acpi_fill_madt()`Angel Pons
2020-08-04mb/supermicro/x11ssh-tf: Drop `PcieRpClkReqSupport` linesAngel Pons
2020-08-04nb/intel/pineview: Remove dead assignmentsAngel Pons
2020-08-04nb/intel/gm45: Deduplicate PCIEXBAR decodingAngel Pons
2020-08-04nb/intel/gm45/northbridge.c: Use `MiB` definitionAngel Pons
2020-08-04nb/intel/gm45: Use PCI bitwise opsAngel Pons
2020-08-04mb/**/{devicetree,overridetree}.cb: Indent with tabsAngel Pons
2020-08-04Documentation: Fix sphinx configurationPatrick Georgi
2020-08-04nb/intel/i440bx: Make ROM area unavailable for MMIOKeith Hui
2020-08-04src/lib: Remove unused function parameters in imd.cAnna Karas
2020-08-03mb/gizmosphere/gizmo/mainboard.c: Remove white space after 'mdelay'Elyes HAOUAS
2020-08-03mb/google/zork: Pass oscout system clk to rt5682Akshu Agrawal
2020-08-03soc/amd/picasso: set is_rv to 1 for RV familyAkshu Agrawal
2020-08-03mb/bostentech: Add GBYT4 portMate Kukri
2020-08-03soc/intel/baytrail: Add MRC SMBus workaroundMate Kukri
2020-08-03lib/gcov: Remove assert(0)Patrick Georgi
2020-08-03soc/intel/xeon_sp/cpx: configure STACK_SIZEJonathan Zhang
2020-08-03soc/intel/xeon_sp/cpx: enable PLATFORM_USES_FSP2_2Jonathan Zhang
2020-08-03mb/asrock/h110m: Relocate devicetree settingsAngel Pons
2020-08-03nb/intel/ironlake: Add Generic Non-Core register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add Generic Non-Core PCI device definitionAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Physical Layer registersAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Physical Layer device definitionAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Link register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add definition for QPI Link PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Add SAD DRAM register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Correct PCIEXBAR definitionAngel Pons
2020-08-03nb/intel/ironlake: Add definition for SAD PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Drop `D0F0_` prefix from register namesAngel Pons
2020-08-03nb/intel/ironlake: Rename memory map variablesAngel Pons
2020-08-03nb/intel/ironlake/raminit.c: Drop unused defineAngel Pons
2020-08-03nb/intel/ironlake/hostbridge_regs: Drop D0F0_PMBASEAngel Pons
2020-08-03nb/intel/ironlake/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/ironlake: Put host bridge registers into its own fileAngel Pons
2020-08-03nb/intel/pineview/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/pineview: Put host bridge registers into its own fileAngel Pons
2020-08-03nb/intel/x4x/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/x4x: Put host bridge registers into its own fileAngel Pons
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