coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-09-10	AUTHORS: Move src/cpu/intel copyrights into AUTHORS file	Martin Roth
2019-09-10	AUTHORS: Move src/cpu/amd copyrights into AUTHORS file	Martin Roth
2019-09-10	AUTHORS: Move src/console copyrights into AUTHORS file	Martin Roth
2019-09-10	AUTHORS: Move src/commonlib copyrights into AUTHORS file	Martin Roth
2019-09-10	AUTHORS: Move src/arch/x86 copyrights into AUTHORS file	Martin Roth
2019-09-10	mb/google/poppy/variant/nocturne: add EC_SYNC_GPIO	Nick Vaccaro
2019-09-10	mb/google/hatch/variants/helios: Modify FPU power on sequence	Frank_Chu
2019-09-10	mb/google/octopus: Add a new sku for meep	Wisley Chen
2019-09-10	mb/google/kahlee/treeya: Tune I2C bus 1, 2 and 3 clock	Peichao Wang
2019-09-10	soc/intel/skylake: Add option to toggle Hyper-Threading	Patrick Rudolph
2019-09-09	mb/google/hatch: Distinguish SKU1 and 2 for eMMC and SSD respectively	Peichao Wang
2019-09-09	soc/amd/picasso: Update TSC and monotonic timer	Marshall Dawson
2019-09-09	soc/amd/common/lpc: Add decode disable function	Marshall Dawson
2019-09-09	soc/amd/common: Add missing stdint.h to lpc.h	Marshall Dawson
2019-09-09	arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0	Kyösti Mälkki
2019-09-09	intel/fsp_broadwell_de: Add early timestamps	Kyösti Mälkki
2019-09-09	intel/fsp_broadwell_de: Enable CONSOLE_CBMEM by default	Kyösti Mälkki
2019-09-09	soc/intel/common/block/cse: Add helper function heci_send_receive	Sridhar Siricilla
2019-09-09	soc/intel/cannonlake: Allow coreboot to handle SPI lockdown	Subrata Banik
2019-09-09	lib/spd_bin: Extend DDR4 spd information	Eric Lai
2019-09-09	mb/google/drallion: modify USB setting	Eric Lai
2019-09-09	mb/asrock/h110m: add missing pci devices to tree	Maxim Polyakov
2019-09-09	mb/asrock/h110m: disable unused sata ports	Maxim Polyakov
2019-09-09	mb/asrock/h110m: disable unused serial buses	Maxim Polyakov
2019-09-09	mb/asrock/h110m: remove unsed i2c_voltage settings	Maxim Polyakov
2019-09-09	mb/asrock/h110m: use VR_CFG_AMP() macro to set PSI threshold	Maxim Polyakov
2019-09-09	mb/asrock/h110m: fix VR domains configuration	Maxim Polyakov
2019-09-09	src/southbridge/amd/pi/hudson/lpc.c: add missing MCFG ACPI table generation	Michał Żygowski
2019-09-09	soc/intel/cannonlake: Add ability to disable Heci1	Bora Guvendik
2019-09-09	drivers/intel/fsp2_0: Fix minor whitespace	Marshall Dawson
2019-09-09	intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK	Kyösti Mälkki
2019-09-07	security/tpm: Use correct hash digest lengths	Jacob Garber
2019-09-06	src/vendorcode/intel: Update Cometlake FSP headers as per FSP v1344	Ronak Kanabar
2019-09-06	soc/amd/common: Add missing stdint.h to acpimmio.h	Marshall Dawson
2019-09-06	soc/amd/common: Add missing stdint.h to BiosCallOuts.h	Marshall Dawson
2019-09-06	superio/smsc/lpc47b397: fix regression in ops override	Felix Held
2019-09-06	src/superio/aspeed/ast2400: Use new SuperIO acpigen	Christian Walter
2019-09-06	soc/intel/skylake: Add Lewisburg family PCH support	Maxim Polyakov
2019-09-06	security/tpm/tss/tcg-2.0: Add support for algorithms	Frans Hendriks
2019-09-06	superio/common: Add ssdtgen for generic SuperIOs	Patrick Rudolph
2019-09-06	soc/mediatek: Fix USB enumeration issue	Changqi Hu
2019-09-06	mb/google/hatch/variants/helios: Update DPTF parameters and TDP PL1/PL2	Frank_Chu
2019-09-06	util/sconfig: Expose usable PCI and PNP device names	Kyösti Mälkki
2019-09-06	nb/intel/x4x/raminit: Move dummy reads after JEDEC init	Arthur Heymans
2019-09-05	mb/google/octopus: Set sar file name for meep sku	Wisley Chen
2019-09-05	inteltool: Add Skylake Xeon E DMI3 Host bridge Id	Maxim Polyakov
2019-09-05	mb/google/drallion: modify PCIE setting	Eric Lai
2019-09-05	inteltool: add Lewisburg C62x GPIOs support	Maxim Polyakov
2019-09-05	mb/google/octopus: Load custom SAR values by SKU ID for Bloog	Tony Huang
2019-09-05	mb/siemens/mc_apl5: Disable IGD if no EDID data available	Mario Scheithauer