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Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I8915ead08a89dcf95fd92983eca5f85b82916dfd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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We typically call checkpatch.pl through make lint which properly adds
the option to tell checkpatch that our lines may be 96 columns long.
However there's one mention of calling checkpatch directly and that
confuses people with complaints about overly long lines that exceed
80 columns.
The lint test that runs checkpatch (and with the right options)
can also be used on a per-directory basis, so offer that instead.
Change-Id: If21e925d2d2394c876724a44b0e23c9b2744c56b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Enable long mode in SMM handler.
x86_32 isn't affected by this change.
As the rsm instruction used to leave SMM doesn't restore MSR registers,
drop back to protected mode after running the smi_handler and restore
IA32_EFER MSR (which enables long mode support) to previous value.
NOTE: This commit does NOT introduce a new security model. It uses the
same page tables as the remaining firmware does.
This can be a security risk if someone is able to manipulate the
page tables stored in ROM at runtime. USE FOR TESTING ONLY!
Tested on Qemu Q35.
Change-Id: I8bba4af4688c723fc079ae905dac95f57ea956f8
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35681
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I157238f18bc1c2eba0adc0b87caa9adaf3fc5d38
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42982
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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* Doesn't affect existing x86_32 code.
Tested on qemu using division by zero.
Tested on Lenovo T410 with additional x86_64 patches.
Change-Id: Idd12c90a95cc2989eb9b2a718740a84222193f48
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30117
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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Add OCP platform Delta Lake documentation.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I9216c80023db071591c8d3add7c0f041e9e6b97e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42947
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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* Add support for Sphinx 3.0+
* Add backward support for Sphinx 1.8 and older
* Make sphinxcontrib ditaa an optional extension
* Allow SPHINXOPTS to be set from command line
* Add sphinx and sphinx-lint to top level Makefile
Change-Id: If10aef51dc426445cb742aad13b19ee7fe169c51
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41492
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I7b657750b10f98524f011f5254e533217fe94fd8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Commit 0013623 (mb/google/dragonegg: remove abandoned project) dropped
this mainboard because it is no longer in development nor used. However,
the associated documentation remained. Rest in pieces, Dragonegg. ;-;
Change-Id: Idd2ee716717132ba3fa237ae97f34686007d3685
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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The code is based on autoport and that for X230. Major differences are:
- Only one DDR3 slot
- HM77 PCH
- M.2 socket instead of mini PCIe
- No docking
- No TPM
Tested:
- CPU i5-3337U
- 8GiB SO-DIMM
- Camera
- PCIe and USB2 on M.2 slot with A key for WLAN
- SATA and USB2 (no SuperSpeed components) on M.2 slot with B key for WWAN
- On board SDHCI connected to PCIe
- USB3 ports
- libgfxinit-based graphics init
- NVRAM options for North and South bridges
- Sound
- ThinkPad EC
- S3
- Linux 4.9 within Debian GNU/Linux stable, loaded from SeaBIOS.
Untested:
- Touch screen, which is said to work under ubuntu but not debian.
Change-Id: Id59cdc5479aaf70809dd1ca613056263661455eb
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41390
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add OCP platform Tioga Pass documentation.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Change-Id: If4c2832d5bd006c572dab035040b4242f8a3d53b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Use the introduced functions and verify pointers in the SMMSTORE.
Make sure to not overwrite or leak data from SMM and update the
documentation as well.
Change-Id: I70df08657c3fa0f98917742d8e1a6cb1077e3758
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41085
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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* Add a function to check if a region overlaps with SMM.
* Add a function to check if a pointer points to SMM.
* Document functions in Documentation/security/smm
To be used to verify data accesses in SMM.
Change-Id: Ia525d2bc685377f50ecf3bdcf337a4c885488213
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41084
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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CB:41612 added a new set of tools for generating SPDs for TGL and JSL
based mainboards. This change adds relevant documentation to
coreboot-4.13 release notes.
Change-Id: I168adad25df9195dec64e8104f2dbe992eebddc6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42092
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I9025ca3b6b438e5f9a790076fc84460342362fc2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41919
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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It is NOT supported. The board is not meant to be flashed externally.
Change-Id: If422810e84355cb94004e5ca2b95d239804699d2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner
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This patch adds support for the Prodrive Hermes mainboard.
Tested with CoffeeLakeFspBinPkg FSP 7.0.68.41.
Untested:
* CNVi
* Intel Graphics
Tested:
* CPU Intel Xeon E2288G
* CPU Intel Core i3-9100F
* CPU Intel Core i7 9700KF
* CPU Intel Core i7 9700E
* CPU Intel Core i7 9700F
* CPU Intel Core i5 9600K
* CPU Intel Pentium Gold G5400
* PCIe Link Width x8 on Slot6 by changing PCIe mux
* All four DDR4 slots in different configurations
* USB2.0 HDR1
* USB2.0 HDR2
* USB3.0 HDR
* Slot1
* Slot2
* Slot3
* Slot4
* Slot6
* M2.M NVMEe
* Ethernet PHYs 0-4
* Aspeed BMC PCIe
* Aspeed BMC USB
* Aspeed Graphics init
* USB3 backplane all working
* I801 SMBUS
Not Working:
* Intel HDA
Change-Id: Id7d051d3fa6823618691d5572087c9ae589c2862
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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CB:41384 (SHA dbcf7b16219df0c04401b8fcd6a780174a7df305) added some new
functionality to devicetree files ("hidden PCI devices"). It's a decent
enough semantic change that it should be added to the release notes for
the 4.13 release.
Change-Id: I52969f63dbc492afd32279176cbcfc2b76d7ac33
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41563
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This change introduces a new top-level interface for interacting with a
bitmask providing firmware configuration information.
This is motivated by Chromebook mainboards that need to support multiple
different configurations at runtime with the same BIOS. In these
devices the Embedded Controller provides a bitmask that can be broken
down into different fields and each field can then be broken down into
different options.
The firmware configuration value could also be stored in CBFS and this
interface will look in CBFS first to allow the Embedded Controller value
to be overridden.
The firmware configuration interface is intended to easily integrate
into devicetree.cb and lead to less code duplication for new mainboards
that make use of this feature.
BUG=b:147462631
TEST=this provides a new interface that is tested in subsequent commits
Change-Id: I1e889c235a81545e2ec0e3a34dfa750ac828a330
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I1ebd2786a49ec8bc25e209d67ecc4c94b475442d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I7c3fd942318f28b4714bc7c2a47bedf85f7923ed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This change adds a document about the SoundWire implementation in
coreboot with details adding new controllers and codecs and
connecting them in the mainboard devicetree.
BUG=b:146482091
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: Ibc04442e22acfc03ff86c49c8a7a215ceefc24c7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40892
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This reverts commit 6b95507ec5b087658178a325bdc68570bc48bb20, in order
to recommit and review it again.
Change-Id: Id4ddf99200f77016a48d02a8421d080cea492aae
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41504
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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A handful of boards do not properly implement the presence straps,
leading libgfxinit to fail to detect an attached display. Add an
override, defaulting to N, which can be set for affected boards.
Add a section to the documentation detailing the option and its usage.
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Change-Id: I43c61d67147878887658b23d90fb1c0b91e7a2af
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41416
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The resource allocator woes post-4.12 release showed room for
improvement on both discussion and documentation. To encourage this
(and encourage reviewers to look out for issues in that space),
extend the review guidelines so that they encourage to more clearly
document the reason for a change with the change (commit message or
our documentation) and also to loop in the mailing list.
Change-Id: I1962dba3fe7e1a01fa4c8b0058297c7d050cb7b7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41493
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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BUG=b:147042464
TEST=Boot trembyle to OS
Signed-off-by: Rob Barnes <robbarnes@google.com>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ife48d5268230f70c6a6f4a56c1f0d05b6c924891
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41381
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Since I seem to forget to remove "Upcoming" in the release notes
every single time, and others might as well, fix it here and also
tell future release managers to take care of that.
Change-Id: I8ffe34f25e954621bdd635e115a8b1a914df9c27
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Based on the autoport. The OptiPlex 9010 comes in four different sizes:
MT, DT, SFF and USFF. Tested on SFF only. The other PCBs are slightly
different, but they are designed with intercompatibility in mind. With
small devicetree overrides it should work on OptiPlex 7010 and other
OptiPlex 9010 variants as well.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I88d65cae30d08ca727d86d930707c2be25a527cf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40351
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The code is based on autoport and that for X230. Major differences are:
- Only one DDR3 slot
- HM77 PCH
- M.2 socket instead of mini pci-e
- no docking
- no tpm
Tested:
- CPU i5-3337U
- Slotted DIMM 8GiB
- Camera
- pci-e and usb2 on M.2 slot with A key for wlan
- sata and usb2 (no superspeed components) on M.2 slot with B key for wwan
- On board SDHCI connected to pci-e
- USB3 ports
- libgfxinit-based graphic init
- NVRAM options for North and South bridges
- Sound
- Thinkpad EC
- S3
- Linux 4.9 within Debian GNU/Linux stable, loaded from
Seabios.
Untested:
- Touch screen, which is said to work under ubuntu but not debian.
Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: Iafa7e0f3734042e35e8b4ea440baf1c3c3d147e9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41017
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Change-Id: I41571c45719dfade49a021b6bafe80afdcb7b581
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Fill in some blanks for 4.12, mark it done, add template for 4.13.
Also update the list of vboot supported boards.
Change-Id: Id6b663f13367eb40e66af30aadd33991c8dd635c
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41259
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Stefan thinks they don't add value.
Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)
The exceptions are for:
- crossgcc (patch file)
- gcov (imported from gcc)
- elf.h (imported from GNU's libc)
- nvramtool (more complicated header)
The removed lines are:
- fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-# This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */
Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: Id6365b86640832b91a722cd12f64c03fc8a41fd7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: Ib78c322730ec6dfa9dcaafa16e5741cd3d351b8d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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Update the documentation now that CB:32705 is merged.
Change-Id: I9845c0750ec4016188478154610400d1b8556793
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40775
Reviewed-by: Marcello Sylvester Bauer <sylv@sylv.io>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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Let's gather some documentation ideas for the season of docs. I reused
the project ideas style (thanks Patrick). Feel free to add yourself as a
mentor here. Also if you have more ideas, please add them to the
document.
Change-Id: I72221cbd53b99cdc946109753cf72af9c865a1e5
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40662
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Fix code blocks, add a newline, use inline code blocks for commands.
Change-Id: Iecf04b00ed12323c124517f2557cc8b60640b618
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39670
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I552d6c3373219978b8e5fd4304f993d920425431
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Update all occurrences of vboot and spell it lowercase.
Change-Id: I432b0db8a3dda43b71844e557a3d89180f25f1c3
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <sylv@sylv.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Describe vboot implementation details for retrofitted Lenovo ThinkPad devices.
Change-Id: Ibabcc939d9d01f00a93fd42adc48057966ad877e
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <sylv@sylv.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39151
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Remove entries for old utilities and add entries for new ones.
Generated using util/util_readme, with some tweaks to preserve the
markdown.
Change-Id: I3a4d8a6bf15a677aa07aa72b8809328110fb72da
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40504
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Later EliteBooks use different EC chips and have different EC firmware
interfaces, so rename the document elitebook_series.md to a more
precise name and also do some rewriting.
A link to the code review page for 8760w is also added because the
port for this laptop is not merged yet.
Change-Id: I2f9b8c4e52ed760c16977d16838cca9e490cda05
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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4K keys are now default.
Change-Id: I16599d0e8b874f9e8a56100fea06d6e4f94a5c00
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37149
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Some features are made mandatory, meaning that some platforms have
been dropped from master. This also explains that further development
on these popular platforms can happen on the 4.11 branch.
TODO is this really the right place or is it too technical for release
notes?
Change-Id: I95e01c301e7db6f81ef88a89d709ebab35c9ccfb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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Currently coreboot is using the compatible ID PNP0303 for all keyboards
and PNP0F13 for all pointing devices, which causes some problems. On
Windows, the touchpad driver can't be automatically matched and
installed through Windows Update. On Linux, there are some strange
issues. So it's better to use the original hardware IDs for each model.
The hardware IDs for the following models can be found By searching for
dmesg logs on vendor BIOS:
T60: https://mail.gnome.org/archives/networkmanager-list/2012-January/msg00110.html
Keyboard: PNP0303 Pointing: IBM0057
R60: https://openbenchmarking.org/system/1202279-AR-COMPRESS715/Lenovo%20R60/dmesg
Keyboard: PNP0303 Pointing: IBM0057
X60: https://github.com/pavelmachek/missy/blob/master/db/notebook/lenovo/thinkpad/x60/pavel/2018.3648803539788/dmesg.out
Keyboard: PNP0303 Pointing: IBM3780
X200: https://ubuntuforums.org/showthread.php?t=1833248&page=2
Keyboard: LEN0010 Pointing: IBM3780
T400: https://github.com/heradon/libreboot-fork/blob/master/docs/future/dumps/logs-t400-bios2.02-ec1.01/dmesg.log
Keyboard: LEN0010 Pointing: IBM3780
T510: https://bbs.archlinux.org/viewtopic.php?id=120287
Keyboard: PNP0303 Pointing: LEN0015
T410: https://forum.ubuntuusers.de/topic/kein-sound-109/
Keyboard: PNP0303 Pointing: LEN0015
T420: https://linux-hardware.org/index.php?probe=e6a094ade5&log=dmesg
Keyboard: PNP0303 Pointing: LEN0015
T420s: https://bbs.archlinux.org/viewtopic.php?id=191510
Keyboard: PNP0303 Pointing: LEN0015
T520: https://bbs.archlinux.org/viewtopic.php?id=195636
Keyboard: PNP0303 Pointing: LEN0015
W520: https://linux-hardware.org/index.php?probe=9306cac54c&log=dmesg
Keyboard: PNP0303 Pointing: LEN0015
T430: https://github.com/farjump/fwtr/blob/master/lenovo/thinkpad-t430/2347ds2/lenovo/g1et73ww-2.09/fwts/20160218_174223/dmesg.log
Keyboard: PNP0303 Pointing: LEN0015
T430s: https://linux-hardware.org/index.php?probe=01545dc8fb&log=dmesg
Keyboard: PNP0303 Pointing: LEN0015
T530: https://forums.fedoraforum.org/showthread.php?316640-Fedora-27-High-CPU
Keyboard: LEN0071 Pointing: LEN0015
W530: https://bugs.freedesktop.org/attachment.cgi?id=115557
Keyboard: LEN0071 Pointing: LEN0015
L520: https://pastebin.com/U6MaBAY3
Keyboard: PNP0303 Pointing: LEN0017
X201: https://linux-hardware.org/index.php?probe=d7085ee4c8&log=dmesg.1
Keyboard: PNP0303 Pointing: LEN0018
X220: https://bbs.archlinux.org/viewtopic.php?id=237669
Keyboard: PNP0303 Pointing: LEN0020
X230: https://forums.bunsenlabs.org/viewtopic.php?id=2460
Keyboard: PNP0303 Pointing: LEN0020
X131e: https://linux-hardware.org/index.php?probe=d765880811&log=dmesg
Keyboard: MSF0001 Pointing: LEN0026
X1 Carbon Gen 1: https://bugzilla.kernel.org/show_bug.cgi?id=85851
Keyboard: LEN0071 Pointing: LEN0030
s230u: https://launchpadlibrarian.net/147231958/dmesg-reboot.txt
Keyboard: PTL0001 Pointing: LEN0031
T540p: https://linux-hardware.org/index.php?probe=da766a30bc&log=dmesg
Keyboard: LEN0071 Pointing: LEN0034
X240: https://linux-hardware.org/index.php?probe=fa7155b0e4&log=dmesg
Keyboard: LEN0071 Pointing: LEN0035
T440p: https://bugzilla.kernel.org/show_bug.cgi?id=91541
Keyboard: LEN0071 Pointing: LEN0036
T440s: https://bugzilla.kernel.org/show_bug.cgi?id=91541
Keyboard: LEN0071 Pointing: LEN0036
T450: https://gist.github.com/kzar/1c38630eb22e4bf5b976
Keyboard: LEN0071 Pointing: LEN200e
Others:
https://github.com/torvalds/linux/blob/master/drivers/input/mouse/synaptics.c
Test result: This can make Windows automatically install the Lenovo
touchpad driver. It also fixes the T440p touchpad issue.
Change-Id: Ifb635da99c5e05f987aaf4f172108d788dcc2932
Signed-off-by: dalao <dalao@tutanota.com>
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36371
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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unmount -> umount. My mistake.
Change-Id: I5d1b675f6ab7c027f2e646424adb1f255967c753
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Set IgdDvmt50PreAlloc to zero if InternalGfx is disabled. It's 'correct'
to do it like this, otherwise the FSP would always allocate memory for
the IGD even if it is disabled. In addition the FSP enables the graphics
panel power even if no IGD is present which leads to a crashing FSP.
Thus, if no IGD is present we switch off the panel via UPDs.
Refer to this issue on IntelFSP for details:
https://github.com/IntelFsp/FSP/issues/49
Tested on:
* CFL platform with IGD
* CFL platform without IGD
Change-Id: I6f9e0f9855224614471d8ed23bf2a9786386ddca
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39454
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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We can make our lifes much easier by removing its dependency on
`ADD_FSP_BINARIES`. Instead, we imply the latter if the repository
is to be used. We can also hide a lot of unnecessary prompts in
this case.
Also, remove default overrides and selects for the two that are
now unnecessary.
Change-Id: I8538f2e966adc9da0fbea2250c954d86e42dfeb3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39882
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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