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2018-12-10Documentation/CoC: make clearer it's also for real world eventsPatrick Georgi
It's not just for the mailing lists, tools and IRC channel. Change-Id: I23883cfd8200496f4281d73b6e75fac0d3448a3c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/30104 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-10Documentation/CoC: revise the instructions for contact the arb teamPatrick Georgi
It's not very helpful to tell somebody who feels wronged "that their mail was probably lost" (in just as many words). State why we don't go for a mailing list or ticket system for grievances and encourage contact multiple people from the outset. Change-Id: Idac4bcdf8b596a7325e463036c580b17a8b2f27b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/30086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-12-10Documentation: Import Code of Conduct from WikiPatrick Georgi
I reordered the contacts by current activity and added a link to the CC-BY-SA license, otherwise it's the original text. Change-Id: I6f41611db8d9a2f60b24d95abdf30f4fd47cd6f2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/30085 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-12-10Documentation: Add documentation about the release processPatrick Georgi
It's originally written by Martin who graciously allowed to me rework it a bit and push it into coreboot's documentation. Change-Id: I14938d678e4620abec7ed5f0d35dddaf00edda6d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/30082 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-07mainboard/lenovo/t430s: Add ThinkPad T431s as a variantBill XIE
The code is based on autoport and that for T430s Tested: - CPU i5-3337U - Slotted DIMM 2GiB - Soldered RAM 4GiB from samsung (There may be more models here) - Camera - pci-e and usb2 on M.2 slot with A key for wlan - sata and usb2 (no superspeed components) on M.2 slot with B key for wwan - On board SDHCI connected to pci-e - USB3 ports - libgfxinit-based graphic init - NVRAM options for North and South bridges - Sound - Thinkpad EC - S3 - TPM1 on LPC - EHCI debug on SSP2 (USB3 port on the left) - Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from Linux payload (Heads), Seabios may also work. Not tested: - Fingerprint reader on USB2 (not present on mine) - Keyboard backlight (not present on mine) - "sticky_fn" flag in nvram Not implemented yet: - Fn locking in nvram (may not be identical to "sticky_fn") - C-based native graphic init (since T431s has eDP instead of LVDS) - Detecting the model of Soldered RAM at runtime, and loading the corresponding SPD datum (3 observed) from CBFS (the mechanism may be similar to that on x1_carbon_gen1 and s230u, but I do not know how to find gpio ports for that, and SPD data stored in vendor firmware.) Change-Id: Ic8062cacf5e8232405bb5757e1b1d063541f354a Signed-off-by: Bill XIE <persmule@gmail.com> Reviewed-on: https://review.coreboot.org/c/30021 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-05Documentation/flash_tutorial/index.md: warn about dots painted on ICsMichael Bacarella
I fried my mainboard because I tried to orient my chip by lining a blue dot on the corner of my chip with a dot depicted on the chip datasheet. They apparently have nothing to do with each other, and this is normal. Add warning about this to the docs to hopefully spare others from a similar fate. Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Change-Id: Ib634589aaa11f75bde2ef2e13d2cacc4cae19a3f Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Reviewed-on: https://review.coreboot.org/c/30028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-12-05Documentation/mainboard/lenovo/t420.md: add pic of chipMichael Bacarella
Provide pic of the flash IC with pinouts labeled, as well as additional text about the chip. Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Change-Id: I9046fa63dcd4d192836417efac68ca7587ac1c91 Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Reviewed-on: https://review.coreboot.org/c/30027 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-12-04Documentation: Clarify minor detail on preparing a layout fileMichael Bacarella
The user needs to pass the original firmware image to create a layout file, not the newly compiled coreboot image. Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Change-Id: If47a88f06076da12d8da7a873c3e5ef64fc1f877 Reviewed-on: https://review.coreboot.org/c/30024 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-04Documentation: Clarify workflow for cloning coreboot from Gerrit.Michael Bacarella
Documentation that was there seems to reference and older version. Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Change-Id: I3709613ae065153123d00801ea1b4ff86b100264 Reviewed-on: https://review.coreboot.org/c/30025 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-04Documentation: s/My/Your/ in getting started with Gerrit docsMichael Bacarella
Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Change-Id: I781e2d78c0525da74dd77f572839d746d3eeb3ce Signed-off-by: Michael Bacarella <michael.bacarella@gmail.com> Reviewed-on: https://review.coreboot.org/c/30026 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-30arch/power8: Rename to ppc64Jonathan Neuschäfer
POWER8 is a specific implementation of ppc64, which is by now outdated (POWER9 has been on the market for a while). Rename arch/power8/ to potentially cover a wider range of hardware. TEST=Toolchains built before/after this commit can build coreboot for emulation/qemu-power8 from before/after this commit. Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
2018-11-30broadcom: Remove SoC and board supportPhilipp Deppenwiese
The reason for this code cleanup is the legacy Google Purin board which isn't available anymore and AFAIK never made it into the stores. * Remove broadcom cygnus SoC support * Remove /util/broadcom tool * Remove Google Purin mainboard * Remove MAINTAINERS entries Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/29905 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-27Documentation/../../dragonegg: Add dragonegg coreboot development documentationSubrata Banik
Change-Id: Ia15e317557a0893d9f80cc9e87c6b90c85b93dcf Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/29829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27Documentation/../../icelake_rvp: Add RVP coreboot development documentationSubrata Banik
Change-Id: If063cbd3436d9ee107945f425a31ba0009039a1d Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/29828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-27Documentation/../../icelake: Add Ice Lake coreboot development documentationSubrata Banik
Add documentation for Ice Lake processor family coreboot development. Documented so far: * What is Ice Lake * Development Strategy * Create coreboot Image * Flashing coreboot Change-Id: Ief4df6ca11f95b75ecddeb560f7887bfadced086 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/29805 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-23soc/intel/common: Bring DISPLAY_MTRRS into the lightNico Huber
Initially, I wanted to move only the Kconfig DISPLAY_MTRRS into the "Debug" menu. It turned out, though, that the code looks rather generic. No need to hide it in soc/intel/. To not bloat src/Kconfig up any further, start a new `Kconfig.debug` hierarchy just for debug options. If somebody wants to review the code if it's 100% generic, we could even get rid of HAVE_DISPLAY_MTRRS. Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29684 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-19Documentation: Add W530 / T530Patrick Rudolph
Change-Id: Ib253308737f8c7a497c6ca13eab88220b1ac27ad Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29685 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-11-17mb/intel/dg43gt: Add documentationArthur Heymans
Change-Id: I4e9dc67e66f719d440679b11332e2c8a764024f4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28258 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-16mainboard: Add ASRock H81M-HDSTristan Corrick
Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This board works quite well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. The file `data.vbt` matches the VBT in the latest stable version of the vendor firmware (version 2.20). Change-Id: I53483bb9fa335e86e85dfc487fef03fce4b85e2a Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/29390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-11-10mb/lenovo/t400: Improve docking codePatrick Rudolph
* Remove dead code * Add support for types 2504 and 2505 * Print dock info at romstage entry * Improve dock disconnect for type 2505 * Move defines into dock.h for future ACPI code * Reduce timeouts according to spec to decrease boot time on error * Fix no docking detection (reduces boot time by 1 second) * Configure GPIO LDN before reading GPIOs * Use Kconfig values instead of fixed defines * Add documentation Tested on Lenovo T500 with docking 2504 and 2505. Change-Id: Ic4510ffadc67da95961cecd51a6d8ed856b3ac99 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29418 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-10-30Documentation/riscv: Improve `index.md`Paul Menzel
1. Add dot/period to the end of sentences 2. Remove blank line at the end of the file 3. Break lines after 75 characters 4. Use RISC-V spelling 5. Add comma for clarity Change-Id: Icbe803dfbe92ca7850204a1a9f7175befe9c8bcf Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/28654 Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Hug <philipp@hug.cx> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-29Documentation: Improve payload fitPatrick Rudolph
* Convert '' to ` * Add example how to use mkimage Change-Id: Id83db3db51582cb0d6ded7f3152b5549fba1f2e7 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-29Documentation/mainboard: Add emulation/spike-riscv.mdJonathan Neuschäfer
Move the usage instructions from their ad-hoc place in Kconfig.name to the Documentation directory, and expand them a bit. Change-Id: Id6c7bbca40a21ecba00cab736af2f2662a985106 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28874 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Philipp Hug <philipp@hug.cx>
2018-10-22Documentation: Fix markdown inline codePatrick Rudolph
recommonmark doesn't know about inline code, while all other software generating documentation is able to handle it. Add support for inline code by adding a wrapper class around the recommonmark parser that converts code to docutils literal blocks. Fixes invisible inline code in current documentation. Change-Id: I0269d15a685ed0c0241be8c8acfade0e58363845 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-22Documentation: Fix markdown highlightingPatrick Rudolph
Fix some code blocks that use invalid Markdown syntax. Change-Id: I8cfe63b2c21ae93923f88bbf7ef4cfb8dccdb5ef Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29207 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-11Documentation: Improve message printed by livesphinx targetJonathan Neuschäfer
Printing "Autobuild finished" after the autobuild server exits (which normally doesn't happen) is not very useful. Change-Id: I909d7ab5f399993dbb1916e66ba94c48d7bc53bf Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28992 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11Documentation: Add and link the arch directoryJonathan Neuschäfer
Fixes: b159d5ba8f ("riscv: add documentation for stages and payloads") Change-Id: I5ca8ed094c9b6d115da707375205872e782a66b2 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11Documentation/releases: Improve readabilityJonathan Neuschäfer
A colon usually indicates that something related follows. But in Documentation/releases/index.md, nothing followed. Fix this by swapping two lines. Change-Id: I3e2750c208a2b725145b94615f64381ac763f0dc Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-08Documentation: Improve elgon documentationPatrick Rudolph
* Convert PNG to JPG and reduce image quality. * Mark flash IC and USB serial connector. * Mark SPI programming header. * Add programming header pinout. Change-Id: Ica5958545ed23573a0d48dfa422ad1a822d06b47 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-06Documentation/mb/sifive: Fix dead linksJonathan Neuschäfer
SiFive's website was reorganized, which broke our links to PDF files. Update these links to the current ones, obtained by browsing https://sifive.com/documentation/. Change-Id: I312de84bf12abb0789bdd971c40033f1e4ea0dd1 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-10-05Documentation/mainboard/gigabyte/ga-h61m-s2pv: Expand pageAngel Pons
Uniformize the Yes/No in the tables, expand the internal programming section and explain how to patch a defective flash descriptor. Change-Id: I972bb8948c29ce0eba46daa92ce6b6052db7b063 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-10-04Documentation/.../gerrit_guidelines: Remove trailing colon from headingsJonathan Neuschäfer
They are unnecessary in headings, and look slightly irritating in the table of contents. Change-Id: I7344026f5753aebdd73f9fe414e96730c823ac26 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28832 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-10-04Documentation: Spell "blob" in lowercaseJonathan Neuschäfer
It's not an acronym (outside of database software). Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-03Documentation/mb/lenovo/t4xx_series: Change "Steps to access the flash IC" ↵Jonathan Neuschäfer
to sub-heading This heading should not be a top-level heading, because it's not at the top of the file. Also remove the trailing colon, because it's unnecessary in a heading. Change-Id: I0685bb8734ad899c29618d24c0497e4fb8c0d01c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-30Documentation: Add basic flashing tutorial for LenovoPatrick Rudolph
* Add basic flashing tutorial ** Describe internal and external flashing ** Describe flash supply diode protection ** Gives general advices on flashing ** Describe how to use flashrom --ifd * Describe basic flashing on Lenovo T4xx devices ** Describe how to disassemble and access the flash IC on T4xx ** Describe flash layout on Sandy Bridge and Ivy Bridge series. Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/27852 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30Documentation: Describe recommonmark's auto_toc_treePatrick Rudolph
Explain recommonmark's auto_toc_tree and give an example to make writing documentation easier. Show an example what happens if the document isn't included in any toctree. Change-Id: I4938d8d292ea890caec6d396b4fa04da65e398f4 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30Documentation: Disable auto_doc_refTom Hiller
According to recommonmark's documentation the enable_auto_doc_ref is deprecated. This is not true, as it's broken with Sphinx 1.6+ commit 12d639873953847de31ec99742b42e50e89ed58c. recommonmark bug report is here: https://github.com/rtfd/recommonmark/issues/73 Instead of using this feature, which doesn't support top level directories in the relative document path anyway, use the TOC tree or inline RST code. Disable auto_doc_ref and document how to reference documents. Change-Id: I9319985b504c4215c33ebbeb9c38317b9efcb283 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30Documentation: add description for util/pmh7toolEvgeny Zinoviev
Change-Id: Iab5daf101a9ff27aa49b7849bf6bf39362b8db09 Signed-off-by: Evgeny Zinoviev <me@ch1p.com> Reviewed-on: https://review.coreboot.org/28368 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-30mainboard/opencellular/elgon: Add mainboard supportPhilipp Deppenwiese
Tested on Elgon EVT board and boots into GNU/Linux. TODO: * Add hard reset function for VBOOT. * Add EC code * Add SPI flash write protection Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/28024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-28Documentation/lib/payloads/fit.md: Consistently indent with tabsJonathan Neuschäfer
Sphinx displays a tab as four spaces, which makes code indented with eight spaces per level stand out. Format the example configuration file in fit.md consistently with tabs to make it look consistent everywhere. Change-Id: Ia1d4c44e68e5267bac1f0f558421c6a0c7a9329c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28734 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-26Documentation: Remove Kconfig.tex and related infrastructureJonathan Neuschäfer
This part of our documentation has bitrotted for a long time. Any remaining information should ideally be moved to Documentation/getting_started/kconfig.md. Change-Id: I3920d002813c2838285446dc0ed8dacfa5364581 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28665 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-21Documentation: fix sphinx warningsTom Hiller
Fix warning from list in table cells for nri_registers.md Change-Id: I2b77ad266d1c5f693536e161f96f3db19832989c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-16Documentation/mb/intel/sandybridge/nri: Change column name to "Comments"Jonathan Neuschäfer
This column doesn't really contain a description, but additional comments. Change-Id: I714972ee336bc1f8a4feb75292ee9efa583f0bb1 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-15riscv: add documentation for stages and payloadsRonald G. Minnich
Change-Id: Iff522e309e9cf9a31c1c79c24047d83d7fd0b00a Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://review.coreboot.org/28619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-14riscv: add trampoline in MBR block to support boot mode 1Philipp Hug
Add "j pc + 0x0800" at the beginning of the MBR to jump to bootblock. Tested on hardware: boot mode 15: works as before boot mode 1: jump to bootblock works, but bootblock needs to be modified to move the stack to L2LIM. This will be in a separate commit. Further changes are needed in the bootblock Change-Id: I16e762d9f027346b124412f1f7ee6ff37f431d86 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27397 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-09-10soc/sifive/fu540: Add driver for OTP memoryPhilipp Hug
Provides minimal functionality to read the SOC s/n from the NeoFuse one time programmable memory. Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27435 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-08-30Documentation/nb/intel/sandybridge/nri_registers.md: Fix mistakeAngel Pons
According to a comment on fa1a07b, the 100MHz clock is the Ivy Bridge only clock, not the 133MHz one. Change-Id: I28fed4a9264b96f93b9e88325f547a5db512514c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28377 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-28Documentation: Normalize release note headingsTom Hiller
Headings are used to populate release note TOC. Change-Id: I39b018ed4498555044616a3aa660abe1047b5449 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-08-28Documentation: fix release version linkingTom Hiller
Correct links to coreboot release notes and fix related "document isn't included in any toctree" warnings. Change-Id: I6563da6f82f5686e54791331312434828c63f5a6 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-27Documentation: Fix formattingTom Hiller
Fix formatting and missing close block quotes in nri_registers.md Change-Id: I5fa0136f4d7f05737a0d53ff9da7d2c77b22d675 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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