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2018-10-11Documentation: Improve message printed by livesphinx targetJonathan Neuschäfer
Printing "Autobuild finished" after the autobuild server exits (which normally doesn't happen) is not very useful. Change-Id: I909d7ab5f399993dbb1916e66ba94c48d7bc53bf Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28992 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11Documentation: Add and link the arch directoryJonathan Neuschäfer
Fixes: b159d5ba8f ("riscv: add documentation for stages and payloads") Change-Id: I5ca8ed094c9b6d115da707375205872e782a66b2 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-11Documentation/releases: Improve readabilityJonathan Neuschäfer
A colon usually indicates that something related follows. But in Documentation/releases/index.md, nothing followed. Fix this by swapping two lines. Change-Id: I3e2750c208a2b725145b94615f64381ac763f0dc Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-08Documentation: Improve elgon documentationPatrick Rudolph
* Convert PNG to JPG and reduce image quality. * Mark flash IC and USB serial connector. * Mark SPI programming header. * Add programming header pinout. Change-Id: Ica5958545ed23573a0d48dfa422ad1a822d06b47 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-06Documentation/mb/sifive: Fix dead linksJonathan Neuschäfer
SiFive's website was reorganized, which broke our links to PDF files. Update these links to the current ones, obtained by browsing https://sifive.com/documentation/. Change-Id: I312de84bf12abb0789bdd971c40033f1e4ea0dd1 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-10-05Documentation/mainboard/gigabyte/ga-h61m-s2pv: Expand pageAngel Pons
Uniformize the Yes/No in the tables, expand the internal programming section and explain how to patch a defective flash descriptor. Change-Id: I972bb8948c29ce0eba46daa92ce6b6052db7b063 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-10-04Documentation/.../gerrit_guidelines: Remove trailing colon from headingsJonathan Neuschäfer
They are unnecessary in headings, and look slightly irritating in the table of contents. Change-Id: I7344026f5753aebdd73f9fe414e96730c823ac26 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28832 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-10-04Documentation: Spell "blob" in lowercaseJonathan Neuschäfer
It's not an acronym (outside of database software). Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-03Documentation/mb/lenovo/t4xx_series: Change "Steps to access the flash IC" ↵Jonathan Neuschäfer
to sub-heading This heading should not be a top-level heading, because it's not at the top of the file. Also remove the trailing colon, because it's unnecessary in a heading. Change-Id: I0685bb8734ad899c29618d24c0497e4fb8c0d01c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-30Documentation: Add basic flashing tutorial for LenovoPatrick Rudolph
* Add basic flashing tutorial ** Describe internal and external flashing ** Describe flash supply diode protection ** Gives general advices on flashing ** Describe how to use flashrom --ifd * Describe basic flashing on Lenovo T4xx devices ** Describe how to disassemble and access the flash IC on T4xx ** Describe flash layout on Sandy Bridge and Ivy Bridge series. Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/27852 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30Documentation: Describe recommonmark's auto_toc_treePatrick Rudolph
Explain recommonmark's auto_toc_tree and give an example to make writing documentation easier. Show an example what happens if the document isn't included in any toctree. Change-Id: I4938d8d292ea890caec6d396b4fa04da65e398f4 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30Documentation: Disable auto_doc_refTom Hiller
According to recommonmark's documentation the enable_auto_doc_ref is deprecated. This is not true, as it's broken with Sphinx 1.6+ commit 12d639873953847de31ec99742b42e50e89ed58c. recommonmark bug report is here: https://github.com/rtfd/recommonmark/issues/73 Instead of using this feature, which doesn't support top level directories in the relative document path anyway, use the TOC tree or inline RST code. Disable auto_doc_ref and document how to reference documents. Change-Id: I9319985b504c4215c33ebbeb9c38317b9efcb283 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28550 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-30Documentation: add description for util/pmh7toolEvgeny Zinoviev
Change-Id: Iab5daf101a9ff27aa49b7849bf6bf39362b8db09 Signed-off-by: Evgeny Zinoviev <me@ch1p.com> Reviewed-on: https://review.coreboot.org/28368 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-30mainboard/opencellular/elgon: Add mainboard supportPhilipp Deppenwiese
Tested on Elgon EVT board and boots into GNU/Linux. TODO: * Add hard reset function for VBOOT. * Add EC code * Add SPI flash write protection Change-Id: I9b809306cc48facbade5dc63846c4532b397e0b5 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/28024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-09-28Documentation/lib/payloads/fit.md: Consistently indent with tabsJonathan Neuschäfer
Sphinx displays a tab as four spaces, which makes code indented with eight spaces per level stand out. Format the example configuration file in fit.md consistently with tabs to make it look consistent everywhere. Change-Id: Ia1d4c44e68e5267bac1f0f558421c6a0c7a9329c Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28734 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-26Documentation: Remove Kconfig.tex and related infrastructureJonathan Neuschäfer
This part of our documentation has bitrotted for a long time. Any remaining information should ideally be moved to Documentation/getting_started/kconfig.md. Change-Id: I3920d002813c2838285446dc0ed8dacfa5364581 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28665 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-21Documentation: fix sphinx warningsTom Hiller
Fix warning from list in table cells for nri_registers.md Change-Id: I2b77ad266d1c5f693536e161f96f3db19832989c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28354 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-16Documentation/mb/intel/sandybridge/nri: Change column name to "Comments"Jonathan Neuschäfer
This column doesn't really contain a description, but additional comments. Change-Id: I714972ee336bc1f8a4feb75292ee9efa583f0bb1 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-09-15riscv: add documentation for stages and payloadsRonald G. Minnich
Change-Id: Iff522e309e9cf9a31c1c79c24047d83d7fd0b00a Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://review.coreboot.org/28619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-14riscv: add trampoline in MBR block to support boot mode 1Philipp Hug
Add "j pc + 0x0800" at the beginning of the MBR to jump to bootblock. Tested on hardware: boot mode 15: works as before boot mode 1: jump to bootblock works, but bootblock needs to be modified to move the stack to L2LIM. This will be in a separate commit. Further changes are needed in the bootblock Change-Id: I16e762d9f027346b124412f1f7ee6ff37f431d86 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27397 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-09-10soc/sifive/fu540: Add driver for OTP memoryPhilipp Hug
Provides minimal functionality to read the SOC s/n from the NeoFuse one time programmable memory. Change-Id: I14b010ad9958931e0a98a76f76090fd7c66f19a0 Signed-off-by: Philipp Hug <philipp@hug.cx> Reviewed-on: https://review.coreboot.org/27435 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2018-08-30Documentation/nb/intel/sandybridge/nri_registers.md: Fix mistakeAngel Pons
According to a comment on fa1a07b, the 100MHz clock is the Ivy Bridge only clock, not the 133MHz one. Change-Id: I28fed4a9264b96f93b9e88325f547a5db512514c Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28377 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-28Documentation: Normalize release note headingsTom Hiller
Headings are used to populate release note TOC. Change-Id: I39b018ed4498555044616a3aa660abe1047b5449 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-08-28Documentation: fix release version linkingTom Hiller
Correct links to coreboot release notes and fix related "document isn't included in any toctree" warnings. Change-Id: I6563da6f82f5686e54791331312434828c63f5a6 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-27Documentation: Fix formattingTom Hiller
Fix formatting and missing close block quotes in nri_registers.md Change-Id: I5fa0136f4d7f05737a0d53ff9da7d2c77b22d675 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-27Documentation: Fix make rule for sphinx-autobuildTom Hiller
Execute sphinx-autobuild for livesphinx make rule Change-Id: I725392f1f132101eede8fed75e8d225c972ad1fe Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-23util/ifdfake: Remove deprecated utilityAngel Pons
Since ifdfake has been deprecated in favor of better alternatives, there is no need to support it any further. Remove it from "util/", as well as any leftover references in other files. Change-Id: I45fe3d9fd606a61d5c3b9d0e6489a1df6d6510f0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28234 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-08-23Documentation: Add make rule for sphinx-autobuildTom Hiller
Add livesphinx to start sphinx-autobuild Change-Id: I9eb3217e758c2c882c759fa7ae75a39aaf1a0358 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/28210 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-23mb/foxconn/d41s: Add mainboardArthur Heymans
This supports the Foxconn d41s, d42s, d51s, d52s. The following is tested (SeaBIOS 1.12 + Linux 4.9) and works: - COM1 - S3 resume (with SeaBIOS needs sercon disabled) - Native graphic init on VGA output - SATA - USB - Ethernet - PS2 keyboard The base for this mainboard port was the Intel D510MO port. Change-Id: Ie4ec9cbf70adcdddbc2e5d805e4806825c320072 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28227 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-22Documentation/northbridge/intel/sandybridge/*: fix typosAngel Pons
Fix some words' spelling and rename "Sandybridge" and "Ivybridge" in text (not filepaths) to match Intel's names "Sandy Bridge" and "Ivy Bridge". Change-Id: Ic77126ccaf1d3ec5530a35d1a0f7d2ea5e174c9a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-13Documentation/gfx: explain port mapping in libgfxinit's configStefan Tauner
Change-Id: Id24ded4ba641aade66468313e33ede1a82090f05 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/27854 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-08-13Documentation/Makefile.sphinx: Be cautious when running `rm -rf`Tristan Corrick
If BUILDDIR were an empty string, running `make clean` would result in running `rm -rf /*`. Omitting the trailing /* prevents this. With a valid BUILDDIR, the behaviour of `make clean` changes slightly in that BUILDDIR itself is removed. However, this is probably more in line with what one would expect from `make clean`. Change-Id: I51b52bb6e7fe73a07fed6291a4f1cc253f2bf319 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/27775 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-08Documentation: Add FIT payload documentationPatrick Rudolph
Describe the new uImage.FIT loader. Change-Id: I8b2060f2a63406669196bcbc190cc1511ae9fe94 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/27253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-08-03mainboard: Add ASUS P8H61-M LXTristan Corrick
Tested with GRUB 2.02 as a payload, booting Debian GNU/Linux 9.5 with kernel 4.9. This code is based on the output of autoport. The file `data.vbt` matches the VBT in the latest version of the vendor firmware (version 4601). This board works well under coreboot. A list of what works and what doesn't can be found in the documentation part of this commit. To summarise: the only known issues are that S3 suspend/resume doesn't work, and that there is no automatic fan control via the super I/O. Change-Id: I2a0579f486d3a44de2dd927fa1e76b90c3b48f62 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/27798 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-07-31Documentation: Add util.md summaryTom Hiller
Add short explanation of Utility list Change-Id: I5fc45ebe29cd42c1aa18c59dabc3ac3db3107bd7 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-26util: Add util_readme scriptTom Hiller
Bash script to concatenate description.md files into ./util/README.md and Documention/Util.md Change-Id: I015ae6816ea74cacb7f0332fda2c3ebef205c1e2 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27564 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-26Documenation/conf.py: Make sure release is a stringArthur Heymans
With python3 the split method can operate on strings while check_output generates bytestrings. Change-Id: I7b455c56e8195f0ecfbe5e360ac161c176f00115 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27630 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-26Documentation/writing_docs: Document the need for recommonmarkArthur Heymans
python-recommonmark is need for sphinx to be able to hande the markdown documentation. Change-Id: I9513ab4bdc753e0350754d9869239ea833893af9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27631 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-24Documentation: Add code_development_model.md to soc/intel/index.mdTom Hiller
Fixes Sphinx WARNING document isn't included in any toctree Change-Id: I956ed23d87c7cbd65383cc64a6af7161e90d6611 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27593 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-24Documentation: Add Binary_Extraction.md to index.mdTom Hiller
Fixes Sphinx WARNING document isn't included in any toctree Change-Id: I4464da8abe7631ec97343059fd36dc96cc17ac12 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27592 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-20Documentation: update draft git commandTom Hiller
refs/drafts/master is deprecated Change-Id: I9c68e496ecd47fb559dd2ad400406007028cbb24 Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27526 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Tested-by: Marc Jones <marc@marcjonesconsulting.com>
2018-07-17Documentation/mb/sifive: Update TODO list; UART driver has been mergedJonathan Neuschäfer
See 894e3a9ec8 ("drivers/uart: Add a driver for SiFive's UART"). Change-Id: I035c238beba28ecafd296f18c0ccda167126ab94 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/27398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-30Documentation/soc/intel: Add common code design documentMaulik V Vaghela
Add common code design document support Intel SoCs such as Skylake, Cannonlake and Apollolake onwards. Documented items: *Introduction *Design Principle *Common code development and status *Common code structure *Benifits Change-Id: I5ade390cfb41c72f812d5cc4e00e67a5964721de Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/27087 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-28Documentation: Add Gigabyte to list of mainboardsAngel Pons
Gigabyte was not in the list of vendors in the mainboard-specific documentation. This made a newly added mainboard page difficult to locate. This commit adds Gigabyte and links said mainboard in the mainboard-specific documentation main page. Change-Id: I8839e1c1176fbdc3dd9da616f68c58e8e1cf1b16 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/27045 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-06-19Documentation: Add cavium SoC and mainboardPatrick Rudolph
* Add documentation for CN81XX SoC * Add documentation for CN81XX EVB SFF mainboard * Add documentation for BDK * Add documentation for BOOTROM and BOOTBLOCK behaviour * Alphabetically sort vendors Change-Id: Ibfcd42788e31f684baed658dc3c4dfe1b8e4f354 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/27150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-15Documentation: Add SandyBridge NRI feature matrixPatrick Rudolph
Change-Id: I69b014430802de132c8d9b6c8409bc762b995468 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/27093 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14src: Get rid of device_tElyes HAOUAS
Use of device_t is deprecated. Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-13Documentation: Add rules for writing DocumentationPatrick Rudolph
Change-Id: Ic3808a0a10ddc8064d185e0920dcd9f60c435419 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/26602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-12Documentation: Add Gigabyte GA-H61M-S2PVAngel Pons
Change-Id: I0064710362a1c7882d5a40b469d6aacad5c60218 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/26964 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 08:41:59 +0000