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2019-07-19Makefile.inc: Enable -Wimplicit-fallthroughJacob Garber
Change-Id: Ic81ed9eb2ed5255a221082326b81c375456a6499 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34300 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-03util/cbfstool: Add AMD BIOS compression tool for PSPMarshall Dawson
Add a utility to generate a compressed BIOS image for AMD Family 17h. If the input is an elf file, the utility extracts the program portion for compression. Otherwise the file is compressed as-is. In modern AMD systems, the PSP brings up DRAM then uncompresses the BIOS image into memory prior to x86 beginning execution. The PSP supports a zlib engine, and interprets the first 256 bytes as a header, where offset 0x14 containing the uncompressed size. For further details, see AMD Platform Security Processor BIOS Architecture Design Guide for AMD Family 17h Processors (NDA only, #55758). BUG=b:127766506 TEST=Use with WIP Picasso Change-Id: Id1c54e0a6dae9e4a0362c6635fe8b8aa48a369d8 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33401 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2019-06-24Makefile: Use ifittool to update FITPatrick Rudolph
Depend on ifittool and use it to update FIT instead cbfstool FIT code. Move the TOPSWAP / microcode handling out of cbfstool and implement it in the Makefile. The new FIT looks like the old one and has been tested on Broadwell-DE. The TOPSWAP / microcode code path needs test on real hardware. Change-Id: I687469d62557f81e9d88398cfc93182164fdac95 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com>
2019-06-21Move -Wlogical-op into xcompileNico Huber
Clang doesn't know `-Wlogical-op`, so let's move it into xcompile where we can easily distinguish between the two. However, this requires us to split out `GCC_ADAFLAGS*` from `GCC_CFLAGS*`. Change-Id: I6a50de0bc5372f61337f237383d32645ba86b0fd Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33579 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-18Makefile.inc: Update 3rdparty/intel-microcode on USE_BLOBSArthur Heymans
Change-Id: I0caeff3ff5613a594a79441e849440ebdc9a9b87 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-06-15Makefile.inc: Add -Wlogical-op warning optionElyes HAOUAS
Change-Id: Ie0491817a3a69c9f8e6f0f0d3cb755c642819df9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33385 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-11Rampayload: Able to build coreboot without ramstageSubrata Banik
This patch removes all possible dependencies in order to build platform with CONFIG_RAMPAYLOAD enable(without ramstage). A. Create coreboot separate stage kconfigs This patch creates seperate stage configs as below 1. HAVE_BOOTBLOCK 2. HAVE_VERSTAGE 3. HAVE_ROMSTAGE 4. HAVE_POSTCAR 5. HAVE_RAMSTAGE B. Also ensures below kconfigs are aligned with correct stage configs 1. COMPRESS_RAMSTAGE and RELOCATABLE_RAMSTAGE are now enable if CONFIG_HAVE_RAMSTAGE is selected. 2. COMPRESS_BOOTBLOCK will enable if CONFIG_HAVE_BOOTBLOCK is set 3. COMPRESS_PRERAM_STAGES will enable if CONFIG_HAVE_VERSTAGE || CONFIG_HAVE_ROMSTAGE is selected. C. Also fix compilation issue with !CONFIG_HAVE_RAMSTAGE On x86 platform: Case 1: ramstage do exist: CONFIG_HAVE_RAMSTAGE=1 >> rmodules_$(ARCH-ramstage-y) will evaluate as rmodules_x86_32 Case 2: ramstage doesn't exist: CONFIG_HAVE_RAMSTAGE=0 >> rmodules_$(ARCH-ramstage-y) will evaluate as rmodules_ This patch fixes Case 2 usecase where platform doesn't select CONFIG_HAVE_RAMSTAGE. Also add option to create sipi_vector.manual based on $(TARGET_STAGE) variable. $(TARGET_STAGE)=ramstage if user selects CONFIG_HAVE_RAMSTAGE $(TARGET_STAGE)=postcar if user selects CONFIG_RAMPAYLOAD Change-Id: I0f7e4174619016c5a54c28bedd52699df417a5b7 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33142 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-05-29Makefile.inc: Extend version string for timeless buildsNico Huber
With the version string "TIMELESS", binaries are slightly smaller than for a regular build. This may lead to false positive build tests if the space is limited (e.g. bootblock). So let's make the string a little longer. Change-Id: I3bbf6f71d5bcd74728a3fe39734312690901d0ec Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32986 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-13Reland "Makefile.inc: Enable -Wtype-limits""Julius Werner
This reverts commit 99e836c843e6a8536348d5cc9581b5a17512a263. This relands commit c4ab50cdde4bfd01ec7509012b105c88bcf4c953. The issues with -Wtype-limits in the vboot submodule have been resolved now, so we can enable this flag again. Change-Id: I32e8cc88e69072e7ee66cf443b578a9a8ea0ebe2 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com>
2019-05-07Revert "Makefile.inc: Enable -Wtype-limits"Patrick Georgi
This reverts commit c4ab50cdde4bfd01ec7509012b105c88bcf4c953. Reason for revert: vboot recently was changed so that -Wtype-limits fails, and that was just brought upstream. Since vboot internals are more likely to be used elsewhere while -Wtype-limits is less critical, revert this until vboot is resolved, then bring -Wtype-limits back again. Change-Id: I9cce10462b9e57189513fa49e11fd27ebe35ba51 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32670 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-06Makefile.inc: Enable -Wtype-limitsJulius Werner
This patch enables -Wtype-limits for the whole repository, which disallows checking for a condition that must be always true or always false based on type width (e.g. checking whether an unsigned variable is negative or whether a 32-bit integer is larger than 4G). This helps avoid easy to make and hard to find (because they often only affect error paths) mistakes like size_t size = fmap_read_area(...); if (size < 0) die("If only the compiler could've told me to use ssize_t instead"); Change-Id: I19edabfd092d09dad720e3fc47b44838163bfe25 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32536 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-03Makefile.inc: Update fsp submodule for all FSP platformsMatt DeVillier
Rather than selectively update the fsp submodule based on FSP version or platform selection, update it when building for any FSP-enabled platform, so all have latest version available. Change-Id: If07d55828a1863623e04a4ecdd1514c3cb6d9c11 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32526 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-04-29Makefile: Check for errors in ACPI decompilation, tooNico Huber
We only grep'ed for "ACPI Warning" resulting in an actual more severe "ACPI Error" being ignored. Change-Id: I9cec8a388f5558b1ffc383cc2fc69405252cbb37 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32469 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-05Makefile: Reduce scope of oprom include pathsKyösti Mälkki
Change-Id: Ibaa5428df1832d3f18946d456fb0b6d2fff65c32 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31694 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-21Makefile.inc: Keep .asl intermediatesNico Huber
We used .aml as the file extension for preprocessed ASL code. That file gets overwritten with the compilation results, fix that. Change-Id: I11a03dfbcebb0fd762da7b27862a7bdb9a581b92 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/31523 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-06Makefile.inc: Create a default SMMSTORE regionArthur Heymans
Change-Id: I7b7b75050e0139ea9a0a4f2ad3c0d69a482fb38b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30421 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-02-06Makefile.inc: Make sure the BIOS region is 64K alignedArthur Heymans
If a non aligned CONFIG_CBFS_SIZE is used the region RW_MRC_CACHE and CONSOLE could end up non aligned. Currently this is only possible if the user messes with CONFIG_CBFS_SIZE in menuconfig, but better be safe than sorry. Change-Id: Ieb7e3c7112bd4b3f9733c36af21b1d59b3836811 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30420 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-06Makefile.inc: Optimize generating the default x86 fmapArthur Heymans
Put the FMAP FMAP region right above the coreboot CBFS region. The other regions like RW_MRC_CACHE and CONSOLE often have alignment requirements so it makes sense to put those on top. This also simplifies the code the generate the default fmap a little. Change-Id: I24fa6c89ecf85fb9002c0357f14aa970ee51b1df Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30419 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-02-06Hook up Kconfig Ada spec fileNico Huber
We generate a $(obj)/cb-config.ads once and copy it per stage that uses it to $(obj)/<stage>/cb-config.ads (to simplify the gnat-bind step). The Ada package is called `CB.Config`. As there was no `CB` package yet, add that too. Change-Id: I963a6517ef4bcf84f2c8e9ae8d24a0d6b971d2b0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/30584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
Does not fix 3rdparty/, *.S or *.ld or yet. Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/17656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-01-15vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fspPatrick Rudolph
Default to FSP binary and headers shiped in 3rdparty/fsp. * Drop headers and code from vendorcode/intel/fsp1_0/broadwell_de * Select HAVE_FSP_BIN to build test the platform * Fetch FSP repo as submodule * Make FSP_HEADER_PATH known from FSP2.0 useable on FSP1.0 * Introduce FSP_SRC_PATH for FSP source file * Add sane defaults for FSP_FILE Tested on wedge100s. Change-Id: I46f201218d19cf34c43a04f57458f474d8c3340d Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30742 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
2019-01-10Untangle CBFS microcode updatesNico Huber
The option to specify a binary file name was added later for platforms that do not provide microcode updates in our blobs repository. Alas, it wasn't visible what platforms these are. And if you specified a file for a platform that already had one, they were all included together. Make it visible which platforms don't provide binaries with the new con- figs MICROCODE_BLOB_NOT_IN_BLOB_REPO, MICROCODE_BLOB_NOT_HOOKED_UP and MICROCODE_BLOB_UNDISCLOSED. Based on that we can decide if we want to include binaries by default or explicitly show that no files are inclu- ded (default to CPU_MICROCODE_CBFS_NONE). Also split CPU_MICROCODE_CBFS_GENERATE into the more explicit CPU_MICROCODE_CBFS_DEFAULT_BINS and CPU_MICROCODE_CBFS_EXTERNAL_BINS. And clean up the visibility of options: Don't show CBFS related options on platforms that don't support it and don't show external file options if the platform uses special rules for multiple files (CPU_MICROCODE_ MULTIPLE_FILES). Change-Id: Ib403402e240d3531640a62ce93b7a93b4ef6ca5e Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/29934 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-04util/gitconfig/pre-commit: Use clang-format to sanitise commitsEdward O'Callaghan
Use the `git-format' tool to sanitise coreboot commits such that they conform to coreboot's coding style. This fancy piece of machinary allows one to have LibFormat from Clang to automatically check your commit conforms to coreboot's coding style, fix any issues automatically and provides you a diff you may review and apply at your convenience. N.B. When the `clang-format' binary is not found we issue a warning that the test was skipped and carry on as usual. Hence, this is strictly non-enforcing at this current time. You may use it at your leisure. Change-Id: If49017ea82f0707efd47cae5978a286a9af8f3b7 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: https://review.coreboot.org/c/8037 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-12-18Fix typos involving "the the"Jonathan Neuschäfer
Change-Id: I179264ee6681a7ba4488b9f1c6bce1a19b4e1772 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/30160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-12-11Makefile.inc: Avoid race condition when using 'make -j<N>'Jonathan Neuschäfer
When building coreboot from scratch with 'make -j4', I sometimes see this error: CREATE build/mainboard/emulation/qemu-riscv/cbfs-file.wblRgZ.out (from /.../coreboot/.config) HOSTCC cbfstool/cbfstool (link) make[1]: execvp: build/util/kconfig/conf: Permission denied make[1]: *** [/.../coreboot/util/kconfig/Makefile:92: savedefconfig] Error 127 It happens, I think, because the rule generated by cbfs-files-processor-defconfig runs 'make savedefconfig', which builds build/util/kconfig/conf, and something also builds it, at the same time. Fix this case, by making this rule depend on $(objutil)/kconfig/conf. The same fix is also precautiously applied to the rule for $(KCONFIG_AUTOHEADER) in Makefile. Change-Id: Ie93eda567f88ca08c97df7e70cdff5b07442747d Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-11-30broadcom: Remove SoC and board supportPhilipp Deppenwiese
The reason for this code cleanup is the legacy Google Purin board which isn't available anymore and AFAIK never made it into the stores. * Remove broadcom cygnus SoC support * Remove /util/broadcom tool * Remove Google Purin mainboard * Remove MAINTAINERS entries Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/29905 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-27build system: Fix FSP downloadingNico Huber
Check for PLATFORM_USES_FSP2_0 instead of MAINBOARD_USES_FSP2_0. The latter is only valid for Skylake where we decide per mainboard if FSP2.0 is used. PLATFORM_USES_FSP2_0 is the one that actually enables the FSP2.0 integration. Change-Id: I3f16e5f4454c0bf02d51db5d1c267a921917f377 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
2018-10-08Move compiler.h to commonlibNico Huber
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-09-13Makefile.inc: Fix dependency tracking of fmap{_config.h,.desc}Nico Huber
GNU make is too smart (or too stupid?) for empty recipes. In the case of empty recipes, GNU make doesn't consider the target as updated even if its prerequisites are. So if we told make to rebuild `build/romstage/ lib/cbfs.o` for instance, and the FMAP changed, it rerun the fmaptool recipe (as a prerequisite) but only considered `cbfs.o` to be updated by chance. Just not leaving the recipes empty seems to help here. I seeemed to remember that it wasn't that easy, but it fixes the issue for me... Change-Id: Ic7ecb88cf7df7f2488defd47ea02255fc10a67e9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-09-02build system: Add automatic downloading of FSP mirror repo if requestedPatrick Georgi
It only happens if both USE_BLOBS and MAINBOARD_USES_FSP2_0 are enabled. Change-Id: I46843c61d3ddf398a3c058bb571d285b596bf5c1 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/28304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-08-23Kconfig, Makefile.inc: Remove all traces of ifdfakeAngel Pons
Since ifdfake has been deprecated in favor of better alternatives, there is no need to support it any further. Remove it from the build system. Change-Id: Id62e95ba72004a1e15453e3eb75f09cb8194feb2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28233 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-20Makefile.inc: Ensure update of build.hNico Huber
There were so many pitfalls that I wrote my own version of this even- tually. This version is inspired by the procedure of Alex Thiessen[1]. Instead of generating a `build.h` on demand, we always generate a tem- porary version that, if it differs from the current one, is added as a dependency. As we use .SECONDEXPANSION on the prerequisites, special care is taken that we won't generate the file twice. As it would be too late to add the dependency if we'd run `genbuild_h.sh` inside a recipe, we have to run it through the `$(shell)` function. But that brings us to the next issue: The make variables used by `genbuild_h.sh` are not expor- ted to this shell like they would be in a recipe. So we export them manually. We could also make these variables explicit parameters of `genbuild_h.sh` instead. An alternative to always creating the temporary `build.h` would be to add a phony target as dependency instead, and finally calling `genbuild_h.sh` again in case we need an update. But, um, we create so many files anyway... [1] https://review.coreboot.org/25685 Change-Id: I311cf610eabae873c70f2985fc7a09acec8061f0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28197 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-06payloads/external/SeaBIOS: add support for sercon portPiotr Król
Change-Id: Id2d2ed0fa97f2cef5818a8508bb8ee3ddba73647 Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/26060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-08-01make: add clang-format prepare-commit-msg hookRonald G. Minnich
To install this hook, run make install-git-commit-clangfmt This will install a pre-commit-msg hook that runs clang-format on all .c and .h files that are staged. It will add a clang-formatted-by: <git username> line to the commit message to indicate that clang-format was run on the files and that further processing of them is not needed. Change-Id: I1773f55b5b4677dad8f4bea017b6328fd93df20c Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://review.coreboot.org/27779 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-24Build system: Add fixes for scanbuildMartin Roth
- Exclude build flags that generate warnings when scanbuild is running - Add the SCANBUILD_ARGS variable to abuild so we can pass in arguments to scanbuild. - Set the default scanbuild argument to -k (--keep-going) so that even if an error occurs it continues with the scan. This is similar to what we do with coverity runs. Change-Id: I82e7c13d7fd7432b43c17a31834ec82fca158a07 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/27595 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-19Kconfig: Add config to insert ucode address in second FITRizwan Qureshi
This config is used to provide the name of a region where a microcode is located. The address of this will be added as the first entry in the FIT of the topswap bootblock. This adds a capability to associate two microcodes for each of the two bootblocks, this allows for the CPU to boot with different microcodes with 2 separate bootblocks. Change-Id: I4ee41d90bae34862aa68c9b8bd69288de1335585 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/27151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-07-19Kconfig: Add config for creating a second bootblockRizwan Qureshi
Intel PCH/Southbridges have feature that it is possible to have the southbridge/PCH look for the bootblock at a 64K or 128K/256K/512K/1MB (in case of newer SoCs) offset instead of the usual top of flash. Add configs to create a second bootblock and configure its size. Change-Id: I4bbd19c35871891b762a0673f840858d972e129e Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/22533 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-04Makefile.inc: Rewrite $(files-in-dir)Nico Huber
The `files-in-dir` macro is supposed to return all files (out of a given set) that reside directly (non-recursive) in a given directory. While the current solution worked splendidly, we can achieve the same without recursive macros that look at each parent dir individually. Beside providing better readability, this also fixes a future make error, as make doesn't like the variable name ` ` anymore ;) Change-Id: Iac0eacdf91b8b5098592ad301c1f3fdb632454e9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/27324 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-02Makefile.inc: Use no-packed-not-aligned only with GCCPaul Menzel
Clang doesn't know the warning `packed-not-aligned`, so only add it when GCC is used. error: unknown warning option '-Wno-packed-not-aligned'; did you \ mean '-Wno-over-aligned'? [-Werror,-Wunknown-warning-option] Change-Id: I86ee12a12fc24a0b8b92c4a0e665103ee4c4003d Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/26879 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25Kconfig: Add new config for OVERRIDE_DEVICETREEFurquan Shaikh
This change adds a new config option OVERRIDE_DEVICETREE that allows variants to provide an override devicetree file to override the registers and/or add new devices on top of the ones provided by baseboard devicetree using CONFIG_DEVICETREE. BUG=b:80081934 Change-Id: Ica046b7e0d70d0f1e8d94da714d1e62032277916 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26691 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-07Makefile.inc: Skip -fconserve-stack flag if running scan-buildMartin Roth
Scan-build refuses to run if the -fconserve-stack flag is added to cflags. It fails with the cryptic message "could not find clang line". Change-Id: Ib1b56ef7d217138a1a195fe993d8e8dd965bd855 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/26878 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22Introduce bootblock self-decompressionJulius Werner
Masked ROMs are the silent killers of boot speed on devices without memory-mapped SPI flash. They often contain awfully slow SPI drivers (presumably bit-banged) that take hundreds of milliseconds to load our bootblock, and every extra kilobyte of bootblock size has a hugely disproportionate impact on boot speed. The coreboot timestamps can never show that component, but it impacts our users all the same. This patch tries to alleviate that issue a bit by allowing us to compress the bootblock with LZ4, which can cut its size down to nearly half. Of course, masked ROMs usually don't come with decompression algorithms built in, so we need to introduce a little decompression stub that can decompress the rest of the bootblock. This is done by creating a new "decompressor" stage which runs before the bootblock, but includes the compressed bootblock code in its data section. It needs to be as small as possible to get a real benefit from this approach, which means no device drivers, no console output, no exception handling, etc. Besides the decompression algorithm itself we only include the timer driver so that we can measure the boot speed impact of decompression. On ARM and ARM64 systems, we also need to give SoC code a chance to initialize the MMU, since running decompression without MMU is prohibitively slow on these architectures. This feature is implemented for ARM and ARM64 architectures for now, although most of it is architecture-independent and it should be relatively simple to port to other platforms where a masked ROM loads the bootblock into SRAM. It is also supposed to be a clean starting point from which later optimizations can hopefully cut down the decompression stub size (currently ~4K on RK3399) a bit more. NOTE: Bootblock compression is not for everyone. Possible side effects include trying to run LZ4 on CPUs that come out of reset extremely underclocked or enabling this too early in SoC bring-up and getting frustrated trying to find issues in an undebuggable environment. Ask your SoC vendor if bootblock compression is right for you. Change-Id: I0dc1cad9ae7508892e477739e743cd1afb5945e8 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26340 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22Makefile.inc: Export CCACHE_EXTRAFILES and add __BUILD_DIR__ definitionJulius Werner
This patch adds the CCACHE_EXTRAFILES variable to the list of exported environment variables, which can be useful as a target-specific variable to make ccache aware of extra dependencies that it cannot figure out on its own. It also adds a CPPFLAGS parameter to define the __BUILD_DIR__ constant for the preprocessor so that the current output build directory can be referenced in C code if necessary. Change-Id: I4fdd08842972cfed8ef5e5a61ebf859c0571bcfb Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26451 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22Makefile.inc: Add separate bootblock.raw.elf with allocatable BSSJulius Werner
This patch moves the objcopy invocation that changes the bootblock's section flags to make sure .data and .bss are preserved in the binary image from the generation of bootblock.raw.bin into a separate bootblock.raw.elf file. Some SoCs (like SDM845) like to have an ELF rather than a raw binary as input to their masked ROM wrapper generation script. Also move those objcopy flags out into a variable because I'll need them again in a later patch. Change-Id: I9557b184df7f753a442c7e0ceb58e81c5e19f2c5 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26338 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-20Makefile.inc: disable warnings on unaligned struct membersPatrick Georgi
We use packed structs with unaligned members all the time, which is the entire point of us using the packed attribute. Change-Id: Ib26b422ba83257d1a7f26134ee20217fad5823cd Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/25996 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-18Makefile.inc: Ignore IASL empty resource template warningsMartin Roth
As I mention in the comment, this is valid ASL, which was added as a warning with the comment "This would appear to be worthless in real-world ASL code." While code using empty resource templates could probably be rewritten, this seems like an arbitrary choice to generate this as a warning, since it's valid. This gets rid of warnings such as this one: dsdt.aml 2975: Return (ResourceTemplate() {}) Warning 3150 - Empty Resource Template (END_TAG only) Which is generated by this code in google/rambi/acpi/mainboard.asl: Method (_CRS) { /* Only return interrupt if I2C1 is PCI mode */ If (LEqual (\S1EN, 0)) { Return (^RBUF) } /* Return empty resource template otherwise */ Return (ResourceTemplate() {}) } Change-Id: I9cfe9069c738a284aa85feada9d58e1aee97e433 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26352 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18Makefile.inc: Drop spurious `-t` from `cbfstool add-payload`Nico Huber
The `-t` argument was never required for `add-payload` and results in a warning now because the type was renamed. TEST=Built with BUILD_TIMELESS=1 and compared binaries with and without this patch. Change-Id: I6ccb70acc6e88a602b90c625040d4f05d8e3630a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26323 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-02-22device: Include devicetree in SMM stageSubrata Banik
Allow bootblock to get access to the entire static device tree as other stages can access independently. TEST=SMM code now can access devicetree.cb variables. Change-Id: I59537c16f0a459e48d8b1efb5c1b196302f13381 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-02-15Makefile.inc: Also print layout at end of buildPaul Menzel
Currently, at the end of a build `CBFSPRINT` prints the content of all CBFS regions. This is confusing, as they are identical. To avoid confusion print the layout beforehand. > layout [-w] – List mutable (or, with -w, readable) image regions Change-Id: Ibf03b125ef6dae41c58b8ae867430047778cfff3 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/22143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-02-10payloads: Add an option to compress secondary payloadsArthur Heymans
Both GRUB and SeaBIOS can chainload lzma compressed payloads. Therefore it is beneficial to compress secondary payloads like Memtest86+, coreinfo, nvramcui,... for both size reasons and often also speed reasons since the limiting factor is generally the IO of the boot device. Tested with SeaBIOS and memtest86+ master on Thinkpad X220. Change-Id: Iddfd6fcf4112d255cc7b2b49b99bf5ea4d6f8db4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 08:18:31 +0000