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2016-08-11build system: Print the content of all regions we add files toPatrick Georgi
That's more useful than just COREBOOT for more complex scenarios Change-Id: I93cd686d698799a3331ca2ea487cd6efb304caa0 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/16143 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11build system: drop -cbfstool-opts variable supportPatrick Georgi
It was a band-aid that isn't required any more. Change-Id: Ib1793ae8fe25eecf9bd5ab8e5feef0d9380b43c2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/16142 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-11build system: allow overriding file position and alignment per regionPatrick Georgi
To override fallback/foo's position or alignment in region BAR, use fallback/foo-BAR-{position,align} = 0x1234 Like for the global settings, specifying both isn't allowed because that's rather pointless. Change-Id: I94f41ebc9f35108267265df4164f23b70e3d0bf6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/16140 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-11build system: remove early stage cbfs-file sortingPatrick Georgi
They're now sorted later in the process after the per-region file lists are determined. Change-Id: I0bba381d09dc4b99e2fe5cae16ff7ffcb5b3aa82 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/16138 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-11build system: order per-region files to optimize placement successPatrick Georgi
Make sure that files with a fixed position are placed first (whose order doesn't matter: either they collide or they don't), then all aligned files (where we just hope that the right thing happens) and finally the files with no further requirements (again, hope). It's still a pretty good heuristic given a typical coreboot image. The global sorting that happens earlier in the build flow will be removed in the future to make room for per-region requirements. Change-Id: I269c00b2ece262c95d310b76a6651c9574badb58 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/16137 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-10build system: change addition order of files to go by regionPatrick Georgi
Instead of adding each file in all requested regions, sort by region, then by file. This is in preparation of per-region file options (eg. position, alignment) Change-Id: Ide09a1c8840279380294a059bbd5d2f9f0cba780 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/16130 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-10Makefiles: Use $(MAINBOARD_DIR) instead of $(CONFIG_MAINBOARD_DIR)Martin Roth
The variable MAINBOARD_DIR already has the quotes stripped off. Change-Id: Ib434ce92bdbc49180fb3f713b26d65ba4cf8c441 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/16117 Tested-by: build bot (Jenkins) Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-10Makefile.inc: Strip CONFIG_DEVICETREE quotes at top of makefileMartin Roth
Minor change - Instead of stripping the quotes from CONFIG_DEVICETREE inline, add it to the location where we normalize all the other Kconfig variables. Change-Id: Idbc58179c7b45160afef7d7e44f9b3b334f8c4a7 Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/16116 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-09build system: drop commented out codePatrick Georgi
Change-Id: I7f36a317f0a7cf4634246a255be79e6bcb2b2442 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://review.coreboot.org/16067 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-08-08sconfig: Remove mainboard chip.h supportMartin Roth
The mainboard chip.h files were (mostly) removed long ago. Change-Id: I1d5a9381945427c96868fa17756e6ecabb1048b2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16080 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-08sconfig: Update command line parametersMartin Roth
Instead of having directories and file names hardcoded, pass in the full path and filename of both the input and output files. In the makefile, create variables for these values, and use them in places that previously had the names and paths written out. Change-Id: Icb6f536547ce3193980ec5d60c786a29755c2813 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16078 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-08sconfig: pass in devicetree filenameMartin Roth
Instead of forcing the hardcoded 'devicetree.cb' filename under the mainboard directory, this allows mainboards to select a filename for the devicetree file. This allows mainboard variants that need to use different devicetree files to live under the same directory. Change-Id: I761e676ba5d5f70d1fb86656b528f63db169fcef Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12529 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-05build system: add easier targetting of cbfstool options per regionAaron Durbin
The first attempt of providing a options-for-region function to call to determining a file's cbfstool options would work, but it means there can only be one instance which has to handle all of the files that may need an override. That logic can be problematic in impelementation. Instead, provide a mechanism to target cbfstool options for a given CBFS region where the implementation is tightly coupled in the build system to where the file as requested to be added to cbfs. This allows there to be a base set of cbfstool options while more easily extending arguments on specific regions. Example which adds '-b 0x10000' only for the COREBOOT CBFS region: cbfs-files-y += file.bin file.bin-COREBOOT-cbfstool-opts := -b 0x10000 Change-Id: Idfafb0205be42768adb04bb0a30fe46a9ca1bd57 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14640 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-08-03Makefile.inc: Strip output of `wc`Nico Huber
Apparently BSD's wc indents its output. Change-Id: I77f50a4b7d6012782f1c1b42ba20a64721c186c8 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16013 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and developer mode check functions to vboot. Thus, get rid of the BOOTMODE_STRAPS option which controlled these functions under src/lib. BUG=chrome-os-partner:55639 Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15868 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-28vboot: Separate vboot from chromeosFurquan Shaikh
VBOOT_VERIFY_FIRMWARE should be independent of CHROMEOS. This allows use of verified boot library without having to stick to CHROMEOS. BUG=chrome-os-partner:55639 Change-Id: Ia2c328712caedd230ab295b8a613e3c1ed1532d9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15867 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-07-27Rename VB_SOURCE to VBOOT_SOURCE for increased clarityPaul Kocialkowski
This renames the VB_SOURCE variable to VBOOT_SOURCE in the build system, providing increased clarity about what it represents. Since the submodule itself is called "vboot", it makes sense to use that name in full instead of a very shortened (and confusing) version of it. Change-Id: Ib343b6642363665ec1205134832498a59b7c4a26 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/15824 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-27device: include devicetree in bootblock stageAaron Durbin
Allow bootblock to get access to the static device tree like other early stages. device_romstage.c was renamed to device_simple.c to better articulate the usage since it's not just being used in romstage. BUG=chrome-os-partner:55357 Change-Id: I3d63d2754c737cc738c09a3e3b3b468362fb78d1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15837 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins)
2016-07-24Makefile: Add uCode binary to FITSubrata Banik
Currently, on Intel Skylake the uCode binary is added to CBFS based on the config option CBFS_EXTERNAL_HEADER. But the entry is missing into the Firmware Interface Table, so add it there. BRANCH=none BUG=chrome-os-partner:55403, chrome-os-partner:53077 TEST=built and verified FIT table has ucode entry. Change-Id: I7dd7459ff7d2468f0aff66eb3ee9c2e3d7eda501 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/15783 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-21flashmap: Use CONFIG_ROM_SIZE as flash size in flashmapWerner Zeh
Currently there are two sources for the final size of the flash image. One is defined as a Kconfig variable (ROM_SIZE) and the other can be provided in a user defined flashmap.fmd. This patch will enable the usage of CONFIG_ROM_SIZE in flashmap.fmd to define the flash size. In this way, the Kconfig variable is the only source of information for the flash image size. This way is optional. Change-Id: Id5298e06d360aaa6d94f2b5a2ffa65e45919853e Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/15219 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-03Add Board Checklist SupportLee Leahy
Build the <board>_checklist.html file which contains a checklist table for each stage of coreboot. This processing builds a set of implemented (done) routines which are marked green in the table. The remaining required routines (work-to-do) are marked red in the table and the optional routines are marked yellow in the table. The table heading for each stage contains a completion percentage in terms of count of routines (done .vs. required). Add some Kconfig values: * CREATE_BOARD_CHECKLIST - When selected creates the checklist file * MAKE_CHECKLIST_PUBLIC - Copies the checklist file into the Documenation directory * CHECKLIST_DATA_FILE_LOCATION - Location of the checklist data files: * <stage>_complete.dat - Lists all of the weak routines * <stage>_optional.dat - Lists weak routines which may be optionally implemented TEST=Build with Galileo Gen2. Change-Id: Ie056f8bb6d45ff7f3bc6390b5630b5063f54c527 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15011 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-01Makefile: Add ifwitool to list of tools to be builtFurquan Shaikh
Add ifwitool to list of tools to be built so that it can be used by the build system. Change-Id: Ifcfbfd87ad9b7ba3ea11cfbcf40894f3e0dae694 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15013 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-26splash: Put the suffix of splash file to CBFS namezbao
The previous code harded the suffix of splash file as "jpg". Actually, SeaBIOS supports both jpg and bmp. Change-Id: I06c4b14aae7f75be3406652a94612b5f30ce91c2 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/14932 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-19jenkins: Run the romcc test suiteJonathan Neuschäfer
Change-Id: I467c56ffc632f58338cb3dbafade15acab5ee016 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14540 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-09xip: Do not pass --xip for early stages if CAR supports code executionFurquan Shaikh
On modern x86 platforms like apollolake, pre-RAM stages verstage and romstage run within the cache-as-ram region. Thus, we do not need to pass in the --xip parameter to cbfstool while adding these stages. Introduce a new Kconfig variable NO_XIP_EARLY_STAGES which is default false for all x86 platforms. Apollolake selects this option since it supports code execution with CAR. Change-Id: I2848046472f40f09ce7fc230c258b0389851b2ea Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14623 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-06cpu/x86: don't treat all chipsets the same regarding XIP_ROM_SIZEAaron Durbin
Previously, the XIP_ROM_SIZE Kconfig variable is used globally on x86 platforms with the assumption that all chipsets utilize this value. For the chipsets which do not use the variable it can lead to unnecessary alignment constraints in cbfs for romstage. Therefore, allow those chipsets a path to not be burdened by not passing '-P $(XIP_ROM_SIZE)' to cbfstool when adding romstage. Change-Id: Id8692df5ecec116a72b8e5886d86648ca959c78b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14625 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-05build system: create fmap for UPDATE_IMAGE configurations, tooPatrick Georgi
This fixes UPDATE_IMAGE builds, assuming that the fmap configuration in the tree didn't change, at least as far as the CBFS regions are concerned. Another option would be to synthesize the fmap related files from the existing image, but that comes with other issues (eg. what about updating images old enough that there is no fmap?) and is more complex, so keep it simple, stupid for now. Change-Id: I036dab9f81f524f7d70bc0029b1ef835e6180a53 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14601 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2016-05-04payload: Fix broken Linux kernel as payloadWerner Zeh
Commit 785a31d67e8f34065a2483080e4fd7032c3a8aad (Makefile.inc: Move payload code to payloads/) breaks the usage of Linux kernel as payload. The reason for it is that cbfs-files-y is evaluated before payloads/external/Makefile.inc is sourced and as a consequence ADDITIONAL_PAYLOAD_CONFIG is empty when it is used for payload options. That leads to missing command line and initrd for the kernel which in turn leads to kernel panic when it boots. To avoid it, move the code which adds payload to cbfs completely to payloads/extranal/Makefile.inc. This way, ADDITIONAL_PAYLOAD_CONFIG is set right before the payload itself is added to cbfs-files-y. I have tested this patch with a Linux kernel as well as with SeaBIOS as payload on mc_tcu3 and it works. If someone sees impact to other payloads just let me know. Change-Id: I7aad352f8b3fc1fdba1875b12648b07eba14e282 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/14579 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-03build system: rename fmap.h to fmap_config.hPatrick Georgi
There's an in-tree fmap.h, and the file generated by fmaptool is likely used in tandem with it. To avoid problems, rename the generated file (which so far isn't used). Change-Id: I95dfde513a7f78677cf18ecd7ce8745e40af316b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14570 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-04-19kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ schemeStefan Reinauer
Reorder drivers to fit src/drivers/[X]/[Y]/ scheme to make them pluggable. Also, fix up the following driver subdirectories by switching to the src/drivers/[X]/[Y]/ scheme as these are hard requirements for the main change: * drivers/intel * drivers/pc80 * drivers/dec Change-Id: I455d3089a317181d5b99bf658df759ec728a5f6b Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14047 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-19Makefile.inc: Stop running git repeatedly for each buildMartin Roth
Currently, the coreboot makefiles repeatedly run git to try to set the KERNELVERSION variable and to fetch the submodules. This happens three times for every build. By exporting a variable, we can catch this on recursive makes and not run each of these steps again. Change-Id: I85ab867b40e80c36bd94d48510ffe3252c6cf93f Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14392 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2016-04-15Makefile.inc: Move payload code to payloads/Stefan Reinauer
Change-Id: I91d9537e8c78560c944c552255e703fc0e6f1f78 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14349 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-04-14Makefile.inc: Disassemble the ACPI AML to detect errorsMartin Roth
This should help catch cases where the AML is not correct. Change-Id: I48efb9ed0b62b3e17dcf3045ef9c32d813a412bc Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14340 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-13payloads: add iPXE 'payload' buildMartin Roth
We already have the ability to add a pxe rom to cbfs, but it needs to be configured and built separately. This moves the existing Kconfig options for PXE from device/Kconfig and the top level Makefile.inc to payloads, and adds the option to download and build iPXE as part of the coreboot build process. This configures the serial output of iPXE to match coreboot's serial port configuration by editing the .h files. iPXE doesn't give any real build-time method of setting these configuration options. Change-Id: I3d77b2c6845b7f5f644440f6910c3b4533a0d415 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14085 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-23arch/x86: introduce postcar stage/phaseAaron Durbin
Certain chipsets don't have a memory-mapped boot media so their code execution for stages prior to DRAM initialization is backed by SRAM or cache-as-ram. The postcar stage/phase handles the cache-as-ram situation where in order to tear down cache-as-ram one needs to be executing out of a backing store that isn't transient. By current definition, cache-as-ram is volatile and tearing it down leads to its contents disappearing. Therefore provide a shim layer, postcar, that's loaded into memory and executed which does 2 things: 1. Tears down cache-as-ram with a chipset helper function. 2. Loads and runs ramstage. Because those 2 things are executed out of ram there's no issue of the code's backing store while executing the code that tears down cache-as-ram. The current implementation makes no assumption regarding cacheability of the DRAM itself. If the chipset code wishes to cache DRAM for loading of the postcar stage/phase then it's also up to the chipset to handle any coherency issues pertaining to cache-as-ram destruction. Change-Id: Ia58efdadd0b48f20cfe7de2f49ab462306c3a19b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14140 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-03-17build system: Allow overriding the path to the futility binaryPatrick Georgi
Change-Id: I84e68e8407149780769c3e6a1148c175e42d1025 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/14100 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-15Makefile.inc: Add toupper, tolower, and ws_to_under macrosMartin Roth
Add a few additional macros that can be used throughout the coreboot makefiles. tolower: returns the value in all lowercase toupper: returns the value in all uppercase ws_to_under: returns the value with any whitespace changed to underscores Change-Id: Icd0e6586481d8f229af0e899e0c94ef7c5c672c3 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14093 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-09Makefile: Add build-time overlap check for programs loaded after corebootJulius Werner
On non-x86 platforms, coreboot uses the memlayout.ld mechanism to statically allocate the different memory regions it needs and guarantees at build time that there are no dangerous overlaps between them. At the end of its (ramstage) execution, however, it usually loads a payload (and possibly other platform-specific components) that is not integrated into the coreboot build system and therefore cannot provide the same overlap guarantees through memlayout.ld. This creates a dangerous memory hazard where a new component could be loaded over memory areas that are still in use by the code-loading ramstage and lead to arbitrary memory corruption bugs. This patch fills this gap in our build-time correctness guarantees by adding the necessary checks as a new intermediate Makefile target on route to assembling the final image. It will parse the memory footprint information of the payload (and other platform-specific post-ramstage components) from CBFS and compare it to a list of memory areas known to be still in use during late ramstage, generating a build failure in case of a possible hazard. BUG=chrome-os-partner:48008 TEST=Built Oak while moving critical regions in the way of BL31 or the payload, observing the desired build-time errors. Built Nyan, Jerry and Falco without issues for good measure. Change-Id: I3ebd2c1caa4df959421265e26f9cab2c54909b68 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13949 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-09Makefile: Update payload clean targetsMartin Roth
Move payload clean targets into payloads/Makefile.inc Add clean targets for coreinfo, nvramcui, Memtest86+ Change-Id: I70c13582311dfba3e309805053159f8a039cb109 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13940 Tested-by: build bot (Jenkins) Reviewed-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-09Add option for "timeless" buildsNico Huber
Builds with BUILD_TIMELESS=1 shall always give a bit identical output for stable inputs. This should help verifying that resulting rom files stay the same across commits that shouldn't change the outcome. To be useful for builds that rely on 3rdparty/arm-trusted-firmware, this needs a similar change there. Change-Id: Ia0a22e3e79fbd0abbd2a9071ecbeef6541787a08 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/13412 Tested-by: build bot (Jenkins) Reviewed-by: Damien Zammit <damien@zamaudio.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-01Makefile.inc: Add dependency on util/kconfig/conf for config.hMartin Roth
This dependency wasn't called out before, and when building with enough threads, the build would fail due to a collision trying to build build/util/kconfig/conf. Fixes this failure: make[1]: execvp: build/util/kconfig/conf: Permission denied /home/martin/git/coreboot/util/kconfig/Makefile:40: recipe for target 'oldconfig' failed make[1]: *** [oldconfig] Error 127 Makefile:167: recipe for target 'build/config.h' failed Change-Id: Ib78d36bab0ba469796d89877bbe6a61e05196e87 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13859 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-26payloads: Load coreinfo as a secondary payloadMartin Roth
This allows coreinfo to be added to CBFS as a 'secondary' payload on x86 systems, to be loaded by the main payload if desired. Selecting this option, which defaults to no, builds the coreinfo payload and adds it to CBFS as `img/coreinfo` which can then be loaded by for example SeaBIOS or GRUB. Change-Id: I52661d486823bc4bb215ce92dca118c9d2c2a309 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13728 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-22cbfs: Add LZ4 in-place decompression support for pre-RAM stagesJulius Werner
This patch ports the LZ4 decompression code that debuted in libpayload last year to coreboot for use in CBFS stages (upgrading the base algorithm to LZ4's dev branch to access the new in-place decompression checks). This is especially useful for pre-RAM stages in constrained SRAM-based systems, which previously could not be compressed due to the size requirements of the LZMA scratchpad and bounce buffer. The LZ4 algorithm offers a very lean decompressor function and in-place decompression support to achieve roughly the same boot speed gains (trading compression ratio for decompression time) with nearly no memory overhead. For now we only activate it for the stages that had previously not been compressed at all on non-XIP (read: non-x86) boards. In the future we may also consider replacing LZMA completely for certain boards, since which algorithm wins out on boot speed depends on board-specific parameters (architecture, processor speed, SPI transfer rate, etc.). BRANCH=None BUG=None TEST=Built and booted Oak, Jerry, Nyan and Falco. Measured boot time on Oak to be about ~20ms faster (cutting load times for affected stages almost in half). Change-Id: Iec256c0e6d585d1b69985461939884a54e3ab900 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13638 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-18Payloads: Add U-Boot as a coreboot-payloadMartin Roth
- Add Kconfig and Makefile options to use U-Boot as a payload. - Add Kconfig option for extra cbfstool command line arguments. - Add Kconfig & Makefile option to load the payload as a flat binary. - Add u-boot directory to .gitignore. This is currently working for X-86 only. Graphics worked in U-Boot correctly by initializing the VBIOS and setting up a console mode. Tested in QEMU and on Minnowboard Max. Got into U-Boot, have not booted an OS yet. Change-Id: Ia122a4ad7cd7d96107c1552b0376c8106ca8fb92 Signed-off-by: Martin Roth <martinroth@google.com> Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/12714 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-11util/marvell: Add Marvell doimage utility and dependency in relevant MakefileRuilin Hao
- Add the doimage sources in util/marvell - Add dependency in root makefile - Add dependency in makefile for armada38x soc BUG=chrome-os-partner:47462 TEST=emerge-cyclone coreboot BRANCH=tot Change-Id: I81b30e0865cbd619a41659c3f2819ad3bafc5f24 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4b2a990150580e0b879a346ed8b71b3765b66bab Original-Change-Id: I7e89b5e96206fde97ce69c296850122fd6c858f9 Original-Signed-off-by: Kefei Yao <kfyao@marvell.com> Original-Reviewed-on: https://chromium-review.googlesource.com/318046 Original-Commit-Ready: Kan Yan <kyan@google.com> Original-Tested-by: Kan Yan <kyan@google.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Kan Yan <kyan@google.com> Original-Reviewed-by: Yuji Sasaki <sasakiy@chromium.org> Reviewed-on: https://review.coreboot.org/13137 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-10gitconfig: Fix make gitconfig if USE_BLOBS is disabledPatrick Georgi
We tested for the presence of .git/modules/3rdparty, which always exists now because of .git/modules/3rdparty/chrome-ec. Test for .../hooks instead since that's the actual location for the later activities. Change-Id: Id5de9f850413c2bc3525faa6cc549641304c3d47 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/13650 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03build system: Add another post-processing stepPatrick Georgi
files_added is for rules that need to run after all CBFS processing is finished, such as SoC-specific postprocessing of the image, or for vboot, to sign the RW regions (that contain CBFS that shouldn't change afterwards.) Change-Id: I830aa0c93429f4971cd68e4358faba5c206c0038 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13557 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-03build_system: Extend site-localMartin Roth
- Add a target at the end of the build that can be used to run additional scripts or additional targets after coreboot.rom is built. - Source a site-local Kconfig file to allow site-specific configuration. This eliminates the need to add a hook for a script at the end of the build because you can add one yourself in site-local. Example site-local/Makefile.inc: build_complete:: ifeq ($(CONFIG_SITE_LOCAL),y) echo "Running additional steps in site-local" # run some script here to make my build unreproducible. endif .phony: build_complete Example site-local/Kconfig: menu "site-local" config SITE_LOCAL bool "site-local enabled" help Enable my site-local configuration to do stuff. endmenu Change-Id: Id4d1e727c69b5cdb05e7d52731bbb1d1e201864a Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13413 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2016-02-03buildgcc: Move all toolchain build targets to util/crossgccStefan Reinauer
There is a lot of potential to completely get rid of Makefile and keep everything in Makefile.inc, but for now this declutters the main Makefile.inc. Change-Id: I653313c74207f955514c036c81efcbfd988827c9 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/13518 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-03buildgcc: Rename ARM target from armv7a to armStefan Reinauer
The ARM target can compile for much more than just v7a. Change-Id: Ia4f67abcffdfe9c56c5d1848c75dfea83755e755 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13517 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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