Age | Commit message (Collapse) | Author | |
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2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi | |
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> | |||
2015-08-19 | libpayload: usb: dwc2: fix usb plug/unplug bug | Yunzhi Li | |
Check device connect status while waiting for usb transfer complete Avoid coreboot get stuck when usb device unplugged BUG=chrome-os-partner:35525 TEST=None BRANCH=None Original-Change-Id: Id103501aa0d8b31b0b81bef773679c0fad79f689 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292630 Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292966 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: David Hendricks <dhendrix@chromium.org> Change-Id: I49396b74131dbfda505d9d3de5adbdc87eb92ce1 Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Reviewed-on: http://review.coreboot.org/11236 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> | |||
2015-07-16 | libpayload: usb: dwc2: support split transaction | Yunzhi Li | |
With split transaction, dwc2 host controller can handle full- and low-speed devices on hub in high-speed mode. This commit adds support for split control and interrupt transfers BUG=None TEST=Connect usb keyboard through hub, usb keyboard can work BRANCH=None Change-Id: If7a00db21c8ad4c635f39581382b877603075d1a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4fb514b7f7f7e414fa94bfce05420957b1c57019 Original-Change-Id: I07e64064c6182d33905ae4efb13712645de7cf93 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/283282 Original-Tested-by: Lin Huang <hl@rock-chips.com> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/10956 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> | |||
2015-07-06 | libpayload: usb: dwc2: support interrupt transfer | Yunzhi Li | |
dwc2 host core do not have a periodic schedule list, so try to send an interrupt packet in poll_intr_queue() function and use frame number read from usb core register to calculate time and schedule transfers. BUG=None TEST=Tested on RK3288 with two USB keyboards(connect to SoC without USB hub), both work correctly. BRANCH=None Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157 Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/280750 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Reviewed-on: http://review.coreboot.org/10774 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> | |||
2015-06-30 | libpayload: add UDC driver for Designware controller | huang lin | |
Found in rockchips rk3288 as used in google/veyron. BUG=None TEST=None BRANCH=None Change-Id: I2f2c36c5bea3986a8a37f84c75608b838a8782ae Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 59a0bcd97e8d0f5ce5ac1301910e11b01e2d24b1 Original-Change-Id: Ic89ed54c48d6f9ce125a93caf96471abc6e8cd9d Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/272108 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Reviewed-on: http://review.coreboot.org/10689 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> | |||
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi | |
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> | |||
2015-04-14 | libpayload dwc2: Use a new FIFO allocation method | huang lin | |
Total FIFO length is split into 512 byte blocks. Allocate these blocks to GRXFSIZ and GNPTXFSZ evenly. This method avoids hardcoding and makes the FIFO size value work for dwc2 controllers that have a different FIFO ram size. BUG=chrome-os-partner:32634 BRANCH=None TEST=Boot kernel from USB Change-Id: I78ce0fa4c4600fb56c991874a93bdd6674e648c2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 5645a25e95f84359cd10fc9fcf56e1f73fd6ce87 Original-Change-Id: Ib50a08c193f7f65392810ca3528a97554f2c3999 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/233119 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9454 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> | |||
2015-04-14 | libpayload: Add dwc2 usb driver | huang lin | |
BUG=chrome-os-partner:29778 TEST=emerge-veyron libpayload Change-Id: I33f312a939e600b8f4e50a092bb61c5d6bc6d741 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 39ffe53336a2a3b2baa067cdd3dccca5ae93f68e Original-Change-Id: Idad1ad165fd44df635a0cb13bfec6fada1378bc8 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/211053 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9453 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> |