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2021-05-03libpayload: i8042: Enable keyboard translation by default on exitDuncan Laurie
Add a Kconfig option to set the keyboard translation state on exit and set the default to true. This restores the keyboard to the power-up defaults for firmware that does not always run libpayload keyboard init to have consistent state, and provides an option to disable translation for keyboards that might need it. Change-Id: I25dfe3f425a5bb57e97476564886672b707aa3bd Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-04-18libpayload/keyboard: Reset to scancode set #2 on exitNico Huber
If we select scancode set #1 and keep that, it can confuse Linux with keyboards that don't return to set #2 when asked to load the defaults. This happens for instance with various integrated Think- Pad keyboards but was also seen with an external PS/2 one. The chosen configuration, scancode set #2 without translation, seems to be the default for many systems. So we can expect other payloads and kernels to work with it. Change-Id: I28d74590e9f04d32bb2bbd461b67f15014f927ec Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47594 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-18libpayload/keyboard: Add a detention stateNico Huber
Instead of ignoring keyboards indefinitely when they failed to initialize, we wait 5s and then start over with the hotplug detection. As we always assume a present keyboard at first, we'd otherwise never have a chance to hot plug a device after the initial 30s timer ran out. Change-Id: I8dec4921b2e932442d52b5118cdcf27090633498 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-18libpayload/keyboard: Implement hot (un)pluggingNico Huber
While we assume a keyboard is attached, we send an echo command every 500ms. If there is no data coming from the keyboard within 200ms, we assume it was detached. Correspondingly, if we assume no keyboard is attached, we run an echo command once per second. Change-Id: I2c75182761729bf30711305f3d8b9d43eafad675 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47593 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-15libpayload: Support herobrineT Michael Turney
BUG=b:182963902 TEST= validated on qualcomm sc7280 developement board Change-Id: Ic28f02cdf5c0e4c2458aee0ad7c74383c88d8874 Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51621 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>
2021-04-07libpayload/storage: Add NVMe driverThomas Heijligen
Tested with qemu virtual NVMe and Intel hardware. Works with FILO. Change-Id: Ie75b1dc743dac3426c230c57ee23b771ba3a6e0c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33582 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-20libpayload: Use volatile pointers in {read,write}{8,16,32,64}Patrick Georgi
This is already the case on x86 but not on the ARM platforms, and {read,write}[bwl] are using volatile pointers, too, so follow suit. Change-Id: I6819df62016990e12410eaa9c3c97b8b90944b51 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-07libpayload: Add a Makefile for in-tree payloadsNico Huber
The new `Makefile.payload` can be included by the Makefiles of pay- loads for in-tree builds. The basic idea is to use libpayload's build results without the `make install` step, and to ensure that incremental builds work. For instance, if libpayload's code changes, a `make` for the payload would automatically update the libpayload build and rebuild the payload. But if there are no code changes in libpayload, only updated files of the payload will be re-built. The configuration of libpayload is supposed to be automatically generated from a `defconfig` file. If this `defconfig` changes, libpayload and the payload will be re-built. Change-Id: If5319f1bf0bcd09964416237c5cf7f8e59f487a2 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47633 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-05payloads/libpayload/arch/arm64/mmu.c: Fix typo in commentElyes HAOUAS
Change-Id: Ieb10a881ef1d983f11318f0f6934491fd19fd0bf Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-02-02treewide [Kconfig]: Remove useless commentElyes HAOUAS
Change-Id: I3dafffa61f4fe6089fd11ef6579626aff8088df5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-30libpayload/arm*: Add 64bit memory access primitivesPatrick Georgi
Add read64 and write64 for consistency with x86. BUG=b:178785769 Change-Id: I342e3a23201d0b804ea5ecfe47ee3e4bb516de4c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-01-11libpayload/lpgcc: Drop redundant linker pathNico Huber
It either doesn't exist (in-tree builds) or is the same as $_LIBDIR. Change-Id: I9551cbfc3295d86c22a3785be7cdc0f65eeb08c4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47632 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-11libpayload/lpgcc: Set proper include paths for in-tree buildsNico Huber
We only need `$_OBJ` in the include path for in-tree builds. Also, curses only need special handling for those and PDCurses turned out to need many more include paths. Change-Id: Idd29ef33065033e26ba61b09d412d8ca3566d643 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47631 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-11libpayload/lpgcc: Add more variables to support in-tree buildsNico Huber
Add $_DOTCONFIG and $_XCOMPILE pointing to the respective files and use them. Change-Id: I719b42d1c8abf055948daf5b000daa30cd249edd Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47630 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-01libpayload/lpgcc: Check for `libpayload.config` for in-tree buildsNico Huber
Instead of checking for an already fully build `libpayload.a`, we check for the `libpayload.config` which is the actual prerequisite to start using `lpgcc`. This will allow compilation of payload sources before or in parallel with the build of `libpayload.a`. Change-Id: Ic0143fefe33560af8b013ae48bbbe231b3ad46f3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2021-01-01libpayload/lpgcc: Turn references to build dir into a variableNico Huber
Introduce a `$_OBJ` variable, that points to the build directory for in-tree usage of `lpgcc`. If unset, the default `../build` relative to the location of `lpgcc` is used. Change-Id: I35112d7533d69aa51252dd2bceec010a62522403 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47629 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-01libpayload: Keep a copy of .config in the build dirNico Huber
This should make it easier to find the correct config for in-tree builds. Change-Id: I08d396ae3cedc65f63c4b8865701ea123c7d56cb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47628 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-01libpayload: Move .xcompile into $(obj)Nico Huber
Keep libpayload's xcompile in its build dir. While we are at it, align things with the top-level version. Having `.xcompile` in a central place led to race conditions when multiple payloads try to build their own libpayloads in parallel. Change-Id: I504e1862db79b368289867f7568c9169f27a1549 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/i8042: Add API to peek on keyboard input queueNico Huber
Change-Id: I60699e044b5bacd3f5292fed7edbf529ae133284 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47592 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24libpayload/keyboard: Add debug output to all state transitionsNico Huber
Change-Id: I643a821d4c41fc068f2bab0bd571b0a4a359f59a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Hide console output by defaultNico Huber
Change-Id: I855d975a4729da34a6fa73a63dbbd12c856bdc00 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47590 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Implement self-testNico Huber
The keyboard self-test is required for some devices. At least one device (integrated keyboard in a ThinkPad X201) actually starts the test automatically leading to spurious output and no response for the first seconds. We wait up to 5s for the self-test result. On failure or timeout, the command will be repeated until the 30s init timer runs out. This happens all in the background of the UI polling loop. To not unnecessarily delay the boot process, we first try an oppor- tunistic initialization which skips the self-test. Change-Id: Ie07b31e74d06e116ac81e76309621eed39a19b49 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Add timestamp to track time spent in a stateNico Huber
Will be used to time out in states that don't always advance. Change-Id: I28235e7638d8157cedf81fd915a41d28a1fc070b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47087 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24libpayload/keyboard: Turn init sequence into a state machineNico Huber
We'll process the init sequence as part of the polling loop. This should have several advantages: * It eases error handling, i.e. we can return to an earlier state. * We don't have to stall initialization when a keyboard takes a little longer. * Generally, these keyboards can be hot-plugged (albeit not by design). Change-Id: I9cf5cf31eb420b3994bec20e56a72d37f3d2996e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Avoid races around input drainingNico Huber
Draining the keyboard's buffer is only possible when the keyboard port is enabled. We should also disable input scanning before, as the buffer could be filled again with new keystrokes otherwise. Change-Id: Ibac9c0d04880ff4a3efda5ac53da2f9731f6602c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47085 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-24libpayload/keyboard: Introduce keyboard_drain_input()Nico Huber
Move the input-buffer draining into a function. It uses the low-level i8042 API directly to avoid conflicts with changes in the high-level keyboard API. Change-Id: I9427c5b8be4d59c2ee3da12d6168d34590043682 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47084 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-24libpayload/keyboard: Revise keyboard_cmd() error handlingNico Huber
Even if we are careful, it's still possible that we read spurious data from the keyboard, e.g. keystrokes. Namely, when we send the reset/disable command, there is a race before the command is pro- cessed. So we should always process data from the keyboard in a loop. We break it, when an ACK (0xfa) or a NAK (0xfe) is received, and warn on unexpected data unless it might be due to the mentioned race. This also gives us the opportunity to use command-specific timeouts which we take from Linux: 1s for the keyboard self-test (as there are keyboards that perform the test before acking the command) and 200ms for all other commands. Change-Id: I60a2643a8ff4b9231c63bf970c8749c97c7d8926 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47083 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-23libpayload/keyboard: Revise scancode set and translation configNico Huber
Some background first: The original XT keyboards used what we call scancode set #1 today. The PC/AT keyboards introduced scancode set #2, but for compatibility, its controller translated scancodes back to set #1 by default. Newer keyboards (maybe all we have to deal with) also support switching the scancode set. This means the translation option in the controller and the scancode set selection in the keyboard have to match. In libpayload, we only support set #1 scancodes. So we either need the controller's trans- lation on and set #2 selected in the keyboard, or the controller's translation off and set #1 selected in the keyboard. Valid configurations: * SET #1 + XLATE off * SET #2 + XLATE on Both with and without the PC_KEYBOARD_AT_TRANSLATED option, we were only configuring one of the two settings, leaving room for invalid configurations. With this change, we try to select scancode set #2 first, which seems to be the most supported one, and configure the controller's translation accordingly. We try to fall back to set #1 on failure. We also keep translation disabled during configuration steps to ensure that the controller doesn't accidentally translate confi- guration data. On the coreboot side, we leave the controller's translation at its default setting, unless DRIVERS_PS2_KEYBOARD is enabled. The latter enables the translation unconditionally. For QEMU this means that the option effectively toggles the translation, as QEMU's controller has it disabled by default. This probably made a lot of earlier testing inconsistent. Fixes: commit a95a6bf646 (libpayload/drivers/i8402/kbd: Fix qemu) The reset introduced there effectively reverted the scancode selection made before (because 2 is the default). It's unclear if later changes to the code were only necessary to work around it. Change-Id: Iad85af516a7b9f9c0269ff9652ed15ee81700057 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-23libpayload/i8042: Add API to get/set kbd translation stateNico Huber
Change-Id: I49aa1c244cb60ea290df102f06f641c765f59fa5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-12-08coreboot tables: Add SPI flash memory map windows to coreboot tablesFurquan Shaikh
This change adds details about the memory map windows to translate addresses between SPI flash space and host address space to coreboot tables. This is useful for payloads to setup the translation using the decode windows already known to coreboot. Until now, there was a single decode window at the top of 4G used by all x86 platforms. However, going forward, platforms might support more decode windows and hence in order to avoid duplication in payloads this information is filled in coreboot tables. `lb_spi_flash()` is updated to fill in the details about these windows by making a call to `spi_flash_get_mmap_windows()` which is implemented by the driver providing the boot media mapping device. BUG=b:171534504 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-05libpayload: Provide API to expose MMU memery ranges for ARM64Meng-Huan Yu
Provide get_mmu_ranges() for ARM64 to let payloads could get MMU ranges for all used memory regions. BUG=b:171858277 TEST=Build in x86, arm, arm64. emerge-zork libpayload depthcharge emerge-nyan libpayload depthcharge emerge-asurada libpayload depthcharge Signed-off-by: Meng-Huan Yu <menghuan@google.com> Change-Id: I39b24aefc9dbe530169b272e839d0e1e7c697742 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2020-11-22libpayload/usb: Add format string checking to usb_debugCaveh Jalali
This turns on the compiler's printf style format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: Ic94ebcbafdde8a5f79278b5635111b99af40f892 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45025 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22libpayload/usb: Fix printf format string mismatches in debug messagesCaveh Jalali
This fixes format string mismatch errors in the USB subsystem found by the compiler's format string checker. BUG=b:167517417 TEST=enabled all USB controllers on volteer and fixed resulting compiler errors when USB_DEBUG is enabled. Change-Id: I4dc70baefb3cd82fcc915cc2e7f68719cf6870cc Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-11-16libpayload/i8042: Increase response timeout to 1.5sNico Huber
The current timeout of 500ms is too low. For instance self-test of the KBC integrated into IT8516E took almost 1s in tests. We already check for presence of the KBC before the self-test. So the timeout should only trigger on a hardware defect and we can leave some margin. Change-Id: I95f01a4e605a9c7deb894a71e102c3a881759bb1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-12Delete mainboard/google/chezaJulius Werner
Work on this mainboard was abandoned and never finished. It's not really usable in its current state, so let's get rid of it. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I4cd2e2cd0ee69d9846472653a942fa074e2b924d Reviewed-on: https://review.coreboot.org/c/coreboot/+/47427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-09libpayload: storage.c: remove unneeded #if CONFIG()Thomas Heijligen
Change-Id: I6e5679f66840105b3f9628071ac7aace9128107f Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-08libpayload: Make OHCI enums into typesJacob Garber
The OHCI header file declares various enums as follows: enum { ... } enum_name; Since the name is at the end, this is actually declaring a variable called enum_name and *not* a type, which is causing a multiple definition error in GCC 10. Move the enum_name before the opening brace to prevent this. Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Change-Id: I452c0a1b118990942aa53f1e7e77f5e8378e8975 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47224 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-08libpayload: Add compiler.h to compiler parametersJacob Garber
Headers in libpayload define various structs like so: struct struct_name { ... } __packed; However, these header files do not include the compiler.h macro that defines what __packed is, so they are actually defining a variable named __packed and *not* declaring a packed struct. This leads to defining the same variable multiple times, which was caught by GCC 10. Add compiler.h to the compiler parameters so it is included in all files automatically. Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Change-Id: Ia67182520dc94149e06fe9e03a14b3fc2ee29973 Reviewed-on: https://review.coreboot.org/c/coreboot/+/47153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-11-02libpayload: Add support for link time optimizationJacob Garber
Link time optimization is a technique for whole-program optimization. Instead of doing code generation during compilation, the compiler saves its intermediate representation to the object files. During the final linking step, it will then merge all the object files together and perform optimizations on the entire program. This can often reduce the final binary size, but also may increase the total compilation time. This patch introduces a Kconfig option for enabling link time optimization in libpayload. Since libpayload does no linking of its own, its LTO archive files will contain only IR and no generated code. Downstream projects will need to use LTO-aware tools when manipulating the archives (eg. gcc-ar and gcc-nm), but otherwise do not need to use LTO themselves -- the compiler will recognize which files are LTO and which are not, so enabling this option should mostly be "drop in". For example, when building coreinfo.elf using tinycurses libpayload: binary size compilation time default 114 KiB 11.49s LTO 95 KiB 10.36s In this case the total compilation time was actually shorter -- despite the final linking step taking longer, this was offset by the shorter compilation times for each individual file (since there is no code gen until the very end). Change-Id: I048f2ff6298ed0d891098942e1e8b29d35487b91 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38291 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-02libpayload/x86: Try to discover invariant TSC rateNico Huber
We can skip the PIT-based TSC calibration if we can derive the invariant TSC rate from CPUID/MSR data. This is necessary if the PIT is disabled, which is the default, for instance, on Coffee Lake CPUs. This implementation should cover all Intel Core i processors at least. For older processors, we fall back to the PIT calibration. Change-Id: Ic6607ee2a8b41c2be9dc1bb4f1e23e652bb33889 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34170 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2020-11-02libpayload/x86: Add enumeration of Intel family 6 modelsNico Huber
The list is incomplete and only contains what we need in the follow-up commit. It can be extended at will. Change-Id: Ibf8ddaf510eb513ee74af3e78da46b04802a91b9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-30lib/libpayload: Replace strapping_ids with new board configuration entryTim Wawrzynczak
There are currently 3 different strapping ID entries in the coreboot table, which adds overhead. The new fw_config field is also desired in the coreboot table, which is another kind of strapping id. Therefore, this patch deprecates the 3 current strapping ID entries (board ID, RAM code, and SKU ID), and adds a new entry ("board_config") which provides board ID, RAM code, SKU ID, as well as FW_CONFIG together. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I1ecec847ee77b72233587c1ad7f124e2027470bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/46605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-10-30.gitignore: Split into subdirectory filesPatrick Georgi
There's no need for the global list of files to ignore, so use git's ability to work with more local configuration. Change-Id: I50882e6756cbc0fdfd899353cc23962544690fb3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46879 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-26libpayload/keyboard: Use `bool` as return typeNico Huber
Use `bool` whenever `0` was used to indicate an error. The mixing of different types for return values was mildly confusing and potentially dangerous with the i8042 API close by that uses `0` for success. Change-Id: I876bb5076c4921f36e3438f359be8ac4c09248cc Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46723 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-26libpayload/curses: Use <stdbool.h>Nico Huber
Change-Id: I35ef7c55fc6bcfb9c51a711a8e238f0970fd4ad4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-26libpayload: Add <stdbool.h>Nico Huber
Change-Id: I972c78c5da4136bc61e78fcbb52d7d162cc1b698 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46721 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-22drivers/smmstore: Implement SMMSTORE version 2Patrick Rudolph
SMMSTORE version 2 is a complete redesign of the current driver. It is not backwards-compatible with version 1, and only one version can be used at a time. Key features: * Uses a fixed communication buffer instead of writing to arbitrary memory addresses provided by untrusted ring0 code. * Gives the caller full control over the used data format. * Splits the store into smaller chunks to allow fault tolerant updates. * Doesn't provide feedback about the actual read/written bytes, just returns error or success in registers. * Returns an error if the requested operation would overflow the communication buffer. Separate the SMMSTORE into 64 KiB blocks that can individually be read/written/erased. To be used by payloads that implement a FaultTolerant Variable store like TianoCore. The implementation has been tested against EDK2 master. An example EDK2 implementation can be found here: https://github.com/9elements/edk2-1/commit/eb1127744a3a5d5c8ac4e8eb76f07e79c736dbe2 Change-Id: I25e49d184135710f3e6dd1ad3bed95de950fe057 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40520 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2020-10-20libpayload/storage/ahci: Use pci_dev struct in ahci_initialize()Felix Singer
Clean up ahci_initialize() by using pci_dev struct. Change-Id: I2d5673c631d978d8ebd0c4a90962ab9cccaf40a2 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-10-20libpayload/storage/ahci: Use pacc pointer to read device classFelix Singer
The PCI bus gets already scanned while gathering system information. Therefore, use the pacc pointer from sysinfo_t to read the device class of PCI devices instead of rescanning the bus. Change-Id: I4c79e71777e718f5065107ebf780ca9fdb4f1b0c Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-10-20libpayload/arch/x86: Introduce pacc pointer in sysinfo_t structFelix Singer
Currently, the PCI bus gets scanned multiple times for various reasons (e.g. to read the device class). Therefore, and in preparation to CB:46416, introduce the pacc pointer in the sysinfo_t struct and scan the PCI bus while gathering system information. Change-Id: I496c5a3d78c7fb5d7c9f119a0c9a0314d54e729f Signed-off-by: Felix Singer <felix.singer@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46348 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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