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2017-07-27libpayload/storage: Replace 1s AHCI reset delay with a timeoutNico Huber
AHCI spec explicitly states that we may poll. TEST=Ran FILO on kontron/bsl6 and observed that the controller always becomes ready during the first delay. Change-Id: If34694abff14d719d10d89bc6771dbfa12065071 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20764 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-27libpayload/storage: Enable bus mastering for AHCINico Huber
This is (thankfully) not done by coreboot any more for recent chipsets. Change-Id: If56e38037f7b1e53871ee63e6ff297028c59d493 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20763 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-26libpayload: Clean up unaligned memset() supportNico Huber
Use a `for` instead of a `while` loop and use meaningful identifiers. Also, don't use more than one variable for one and the same purpose, don't use more (non-const) variables than necessary, don't alter more than one variable per statement, don't compare pointers of different types and don't do pointer arithmetic on `void *`. This was meant as a fix up to a regression but that has already been fixed. Change-Id: I0c8fd118d127a26cfcf68bfb0bf681495821e80a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20750 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-07-26payloads/depthcharge: Fix clean targetNico Huber
This line has a weird history. It got a `|| exit 0` removed lately which obviously was there to fix the presence of the superfluous `test` at the beginning. Now, remove the `test` too to make the clean target always succeed again ;) Change-Id: I9e069cf5d9ac8416cf350161439aa60798ef7b6b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/20769 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-23depthcharge: Update buildMartin Roth
- Add prompt so the defconfig can be selected for the build. - Remove target rename code from makefile. The old versions don't build with the latest vboot, so this isn't useful anymore. - Change $(info ...) to an echo. info prints immediately when evaluated, which made it print when it shouldn't have, on make clean for example. - Split up single line shell scripts into multiple lines - Change checkout target to only update the commit id when actually changing versions instead of on every build. Change-Id: I46fc2822cf93c821b402e8961ceecedc088f486c Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-07-23depthcharge: Update stable commit idMartin Roth
Update from commit eb583fa8 - Wed Mar 29, 2017 (rk3399_sdhci: Reintroduce PHY power-cycling at 52MHz) to commit 5a086f5c - Tue Jul 11, 2017 (ps8751: enable software sync) This brings the stable version of depthcharge forward by 74 commits. Change-Id: I3a3719fa3a91824042d452de7774be85b884d96d Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-07-20libpayload: Fix unaligned buffer logic in default_memsetMarshall Dawson
Fix an issue when setting an unaligned buffer where n is less than the difference of the rounded up pointer and the pointer. This was identified where n=1 was passed. n was decremented once, as expected, then decremented again after the while() evaluated to false. This resulted in a new n of 4GB. Change-Id: I862671bbe7efa8d370d0148e22ea55407e260053 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/20655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
Also unify __attribute__ ((..)) to __attribute__((..)) and handle ((__packed__)) like ((packed)) Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/15921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-13libpayload: Support unaligned pointer for memcpy, memmove and memcmpJeremy Compostella
The memcpy(), memmove() and memcmp() functions use word by word operations regardless of the pointer alignment. Depending on the platform, this could lead to a crash. This patch makes the memcpy(), memmove() or memcmp() operate byte per byte if they are supplied with unaligned pointers. Change-Id: I0b668739b7b58d47266f10f2dff2dc9cbf38577e Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/20535 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-07-12libpayload: Support unaligned pointers for memsetJeremy Compostella
The optimization of the memset() function introduced by commit dbadb1dd634c8c9419215ade0666a7fb69a4447b (libpayload: Reorder default memcpy, speed up memset and memcmp) is provoking an issue on x86 platform when compiling without the CONFIG_GPL option. GCC is making use of the movdqa instruction to copy words. This instruction can raise a "General Protection Fault Exception" when it is called on a non-aligned address argument. Change-Id: I73382a76a4399d8e78244867f2ebb1dca176a6bf Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/20524 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-28libpayload: Add mouse cursor driverPatrick Rudolph
Add a driver to handle multiple low level mouse drivers and provide basic cursor acceleration support. Tested on Lenovo T500. Change-Id: Ib7cec736631b8acf81a14d28daa29ff720777b10 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18593 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-28payloads: Add whitespace around '<<'Elyes HAOUAS
Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20396 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27libpayload/drivers/usb/ehci_private.h: Add brackets around macroElyes HAOUAS
Change-Id: Iee8dc03d5a4ca7537c7da4fed2c67b169c9e2422 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-06-27libpayload/drivers/usb/xhci_private.h: Add parentheses around macroElyes HAOUAS
Change-Id: I0347594e9480dedc4845b6863733a67fc5e47e1c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20371 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-27coreinfo: Use regular `if` over `#if` for `IS_ENABLED`Nicola Corna
When using the regular `if` construct, the compiler will check the guarded code independently from the condition. Change-Id: I00c5c7ae3720f75aa9415edb94cd2ce76cee8aee Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-27libpayload/drivers/usb/ohci_private.h: Add brackets around macroElyes HAOUAS
Change-Id: Id4892adba161cd08eecde71a011384b6c465b98f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/20372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-06-27libpayload: corebootfb: Add null check for framebuffer addressDuncan Laurie
If the framebuffer address is zero the corebootfb_init() function should abort and not attempt to use it for video, otherwise it will likely hang. This was tested by booting on a board that does not have a display attached and includes the previous patch to zero the framebuffer structure in the coreboot tables. Change-Id: I53ca2e947a7915cebb31b51e11ac6c310d9d6c55 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/20368 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-26libpayload: Enable building libpayload with march=i586Lee Leahy
Add a Kconfig value to enable building libpayload with the 586 compiler. Update the cross compiler script to add the Kconfig value name that is used when libpayload builds. The Quark SOC does not support some of the instructions generated with the 686 compiler (e.g. CMOV). Success occurs when payloads/libpayload/build/config.h indicates that CONFIG_LP_USE_MARCH_586=1. TEST=Build and run on Galileo Gen2. Change-Id: I04907e9a38ee139bae2e8b227821f54614707c25 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/20322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-26libpayload/configs: Add configuration for GalileoLee Leahy
Add the default configuration file for the Galileo board. The Quark SOC requires building libpayload with march=i586. TEST=Build and run on Galileo Gen2 Change-Id: Ifd4b533feacbab6f0d357e13d8cebb64bc1c18c6 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/20323 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-07payloads/Kconfig: Add NO_DEFAULT_PAYLOADNico Huber
This symbol can be selected (e.g. in site-local/) to disable the user friendly but annoying default payload choice. Change-Id: I2f72d4efc0a428dce377c3d003b2c00a6c8d4c08 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/19808 Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-07payloads: change coreboot to lowercaseMartin Roth
The word 'coreboot' should always be written in lowercase, even at the start of a sentence. Change-Id: I2ec18ca55e0ea672343a951ab81a24a5630f45fd Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20028 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-06-07Use www.coreboot.org over coreboot.orgPaul Menzel
<https://coreboot.org> is redirected to <https://www.coreboot.org>. ``` $ curl -I https://coreboot.org HTTP/1.1 301 Moved Permanently Server: nginx/1.8.1 Date: Mon, 05 Jun 2017 10:41:33 GMT Content-Type: text/html Content-Length: 184 Connection: keep-alive Location: https://www.coreboot.org/ ``` So use the command below to use the final location to save a redirect. ``` $ git grep -l https://coreboot.org \ | xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g' ``` Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20035 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
The coreboot sites support HTTPS, and requests over HTTP with SSL are also redirected. So use the more secure URLs, which also saves a request most of the times, as nothing needs to be redirected. Run the command below to replace all occurences. ``` $ git grep -l -E 'http://(www.|review.|)coreboot.org' | xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g' ``` Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-06nvramcui: Use regular `if` over `#if` for `IS_ENABLED`Paul Menzel
When using the regular `if` construct, the compiler will check the guarded code independently from the condition. Change-Id: I988fa9379e8c748013a67ef29fa908b4d9a970ad Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/18794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-04Kconfig: Add choice of framebuffer modeNico Huber
Rename `FRAMEBUFFER_KEEP_VESA_MODE` to `LINEAR_FRAMEBUFFER` and put it together with new `VGA_TEXT_FRAMEBUFFER` into a choice. There are two versions of `LINEAR_FRAMEBUFFER` that differ only in the prompt and help text (one for `HAVE_VBE_LINEAR_FRAMEBUFFER` and one for `HAVE_LINEAR_FRAMEBUFFER`). Due to `kconfig_lint` we have to model that with additional symbols. Change-Id: I9144351491a14d9bb5e650c14933b646bc83fab0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/19804 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-30arm64: Align cache maintenance code with libpayload and ARM32Julius Werner
coreboot and libpayload currently use completely different code to perform a full cache flush on ARM64, with even different function names. The libpayload code is closely inspired by the ARM32 version, so for the sake of overall consistency let's sync coreboot to that. Also align a few other cache management details to work the same way as the corresponding ARM32 parts (such as only flushing but not invalidating the data cache after loading a new stage, which may have a small performance benefit). Change-Id: I9e05b425eeeaa27a447b37f98c0928fed3f74340 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19785 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-25detachables: Add invert parameterShelley Chen
Instead of storing inverted-colored bitmaps, invert drawing of text bitmap on the fly by adding an invert parameter down to libpayload. Merging pivot and invert fields into flags field. BUG=b:35585623 BRANCH=None TEST=Make sure compiles successfully CQ-DEPEND=CL:506453 Change-Id: Ide6893a26f19eb2490377d4d53366ad145a9e6e3 Signed-off-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/19698 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-05-01cbgfx: Add portrait screen supportNickey Yang
cbgfx currently does not support portrait screen which height >width. so add it. Change-Id: I66fee6d73654e736a2db4a3d191f030c52a23e0d Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Reviewed-on: https://review.coreboot.org/19474 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-04-29libpayload/gdb: fix unused variable warningPatrick Georgi
input_underrun is defined but not used. A reasonably new compiler, enabled warnings and warnings-as-error make the build break for no good reason. Change-Id: Ibeb7ba53aad5738938093ab7b34695c9c99c9afe Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/19482 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-04-20Turn CBMEM console into a ring buffer that can persist across rebootsJulius Werner
This patch allows the CBMEM console to persist across reboots, which should greatly help post factum debugging of issues involving multiple reboots. In order to prevent the console from filling up, it will instead operate as a ring buffer that continues to evict the oldest lines once full. (This means that if even a single boot doesn't fit into the buffer, we will now drop the oldest lines whereas previous code would've dropped the newest lines instead.) The console control structure is modified in a sorta backwards-compatible way, so that new readers can continue to work with old console buffers and vice versa. When an old reader reads a new buffer that has already once overflowed (i.e. is operating in true ring buffer mode) it will print lines out of order, but it will at least still print out the whole console content and not do any illegal memory accesses (assuming it correctly implemented cursor overflow as it was already possible before this patch). BUG=chromium:651966 TEST=Rebooted and confirmed output repeatedly on a Kevin and a Falco. Also confirmed correct behavior across suspend/resume for the latter. Change-Id: Ifcbf59d58e1ad20995b98d111c4647281fbb45ff Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18301 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-19libpayload/libc/console: Flush input driver buffer on initFurquan Shaikh
When console input driver registers itself, perform flush of input buffer to avoid interpreting any stale key presses before libpayload is run. keyboard.c: Remove the redundant buffer flush. 8250.c: Ensure that serial_hardware_is_present is set before call to add input driver. BUG=b:37273808 TEST=Verified that any key presses in serial console before payload is up do not have any effect after the payload starts running. Change-Id: I46f1b6715ccf6418f5b2c741bf90db2ece26a60d Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-17libpayload: cbgfx: Show square images on portrait displaysJulius Werner
CBGFX currently doesn't support portrait screens at all. This will have to be fixed eventually but might take a bit of effort. As a first step to make devices with a portrait panel somewhat usable, this patch will just force a square canvas on these panels and keep the bottom part of the screen black. Also switch set_pixel to calculate framebuffer position via bytes_per_line instead of x_resolution. This is supposed to be the canonical way to do that and may differ in cases where the display controller requires a certain alignment from framebuffer lines. Change-Id: I47dd3bf95ab8a7d8b7e1913e0ddab346eedd46f1 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19279 Tested-by: build bot (Jenkins) Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2017-04-17payloads/seabios: Update stable from 1.10.1 to 1.10.2Paul Menzel
SeaBIOS 1.10.2 was released on February 28th, 2017 [1][2] with the changes below. ``` $ git log --oneline rel-1.10.1..rel-1.10.2 5f4c7b1 QEMU fw_cfg: Write fw_cfg back on S3 resume c45ca70 QEMU fw_cfg: Add functions for accessing files by key 31b6229 QEMU fw_cfg: Add command to write back address of file aa7219d romfile-loader: Switch to using named structs 2a1d88c QEMU DMA: Add DMA write capability d2ac564 ps2port: Disable keyboard/mouse prior to resetting ps2 controller b0e3c67 vgasrc: Increase debug level ca3ab93 ahci: Set upper 32-bit registers to zero ``` This fixes the problem on a Lenovo X60, that the keyboard is not initialized by SeaBIOS when for example loaded from GRUB. [1] https://www.seabios.org/Releases#SeaBIOS_1.10.2 Change-Id: Idc078ffa896b2e105faabd2d8befeaf9a2a0b6ac Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/19290 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-14payloads/external/depthcharge: Update stable commit idMartin Roth
Update from commit 124af94f - Fri Feb 26, 2016 (skylake boards: unconditionally re-enable 8254 PIT for legacy) To commit eb583fa8 - Wed Mar 29, 2017 (rk3399_sdhci: Reintroduce PHY power-cycling at 52MHz) This brings the stable version of depthcharge forward by 325 commits. Change-Id: I31b3235df6d36409ff1b365e6adb6852281df097 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/19220 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-14payloads/external/iPXE: Update stable versionMartin Roth
Update from commit 2afd66eb - Fri Jul 29, 2016 ([pixbuf] Enable PNG format by default) To commit fd6d1f46 - Fri Mar 31, 2017 ([thunderx] Use ThunderxConfigProtocol to obtain board configuration) This moves the stable iPXE commit forward 144 commits. Change-Id: Ia0c97f863be39632c9206ca95b3857047fc37e26 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/19221 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-07libpayload: Add gru configPaul Kocialkowski
This adds a gru libpayload config, that should fit all gru-based devices such as kevin. As gru-based devices are CrOS devices, select the associated config to enable CrOS-specific features. Change-Id: I6e79b763fc497c126612b8786a669a33b57ea29f Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/19137 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-03-19tint: Add USB supportNicola Corna
Enable the USB during the initialization of tint. Without it USB keyboards don't work, which makes this payload pointless on systems where a PS/2 keyboard port isn't available. Based on I98f0ccdb19d6b195572941cf87ce3221f57db7c5 (tint and nvramcui: enable USB, update tint to 0.04+nmu1 with changes) [1] [1] https://review.coreboot.org/17507/ Change-Id: Iaa8dfac0301ef19a2d76a0975d025b00e7f3807b Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18766 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-15libpayload: usbhub: Force enumeration of all connected ports on initJulius Werner
We have found a non-compliant USB hub (RealTek RTS 5413) that does not set a port's Connect Status Change bit on its USB 3.0 half if the port had already been connected while the hub was being reset. To work around this bug, this patch adds code to initially request the status of every port after a hub was enumerated, clear the Connect Status Change bit if set, and then enumerate the port iff it is currently connected, regardless of whether the change bit was set. A similar behavior can also be found in the Linux kernel. BRANCH=oak BUG=b:35929438 TEST=Booted Elm with this change, my USB 3.0 sticks enumerate now even if they had been plugged in since boot. Change-Id: I8a28252eb94f005f04866d06e4fc61ea265cee89 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18729 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-13nvramcui: Add USB supportNicola Corna
Enable the USB during the initialization of nvramcui. Without it the USB keyboards don't work, which makes this payload pointless on the systems where a PS/2 keyboard port isn't available. Based on https://review.coreboot.org/#/c/17507/ Change-Id: I04697c5f582b41e6f6ffe98955bf59f4fe57f66e Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18765 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-03-08libpayload-x86: Enable SSE and FPU when presentPatrick Rudolph
Allows to use SSE and floating point in payloads without digging to much into x86 assembly code. Tested on Lenovo T500 (Intel Core2Duo). Both floating point operation and SSE is properly working. Change-Id: I4a5fc633f158de421b70435a8bfdc0dcaa504c72 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-02-28payloads/seabios: Add support for Hudson UARTRicardo Ribalda Delgado
Since version 9332965 "serialio: Support for mmap serial ports", SeaBIOS supports memory mapped serial ports. This patch automatically configures SeaBIOS when the Hudson UART is enabled. Change-Id: I072f6a957df7e143d790783546b0725bcd597d9c Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-on: https://review.coreboot.org/18025 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-02-24payloads/external/GRUB2: Add "git revision" to the GRUB2 version menuDenis 'GNUtoo' Carikli
This change is based on the following commit: 3aa91dc payloads/seabios: Add "git revision" to the SeaBIOS version menu Change-Id: I9987e3673e70b5cb20173d1ddff6060f42a5374a Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: https://review.coreboot.org/18352 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-23libpayload: Add oak configPaul Kocialkowski
This adds an oak libpayload config, that should fit all oak-based devices such as elm. Change-Id: Iabb71404ff84029a5976371a353e8c92e781ca1f Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/18447 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-02-17grub: Build module `boottime`Paul Menzel
Configure GRUB to build with boot time statistics. That allows users to add that module to GRUB by adding `boottime` to the list of extra modules. Change-Id: I76a07e49aecb37652fe8c7d6a9421fd464424287 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/18367 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-02-17libpayload: multiboot - support meminfo flagMathias Krause
Some simple implementation of the MultiBoot protocol may not pass a memory map (MULTIBOOT_FLAGS_MMAP missing in the flags) but just the two values for low and high memory, indicated by the MULTIBOOT_FLAGS_MEMINFO flag. Support those kind of boot loaders too, instead of falling back to the hard-coded values in lib_get_sysinfo(). Tested with a multiboot enhanced version of FILO. Change-Id: I22cf9e3ec0075aff040390bd177c5cd22d439b81 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18350 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-02-17libpayload: x86/head - implement argc/argv handlingMathias Krause
Implement the argc/argv passing as described in coreboot’s payload API: http://www.coreboot.org/Payload_API While at it, give the code some love by not needlessly trashing register values. Change-Id: Ib830f2c67b631b7216843203cefd55d9bb780d83 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18336 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-02-17libpayload: x86/exec - simplify and robustify the codeMathias Krause
Simplify the code by directly using the arguments on the stack as base pointer relative memory references, instead of loading them into intermediate registers first. Make it more robust by preserving all callee saved registers mandated by the C calling convention (and only those), namely EBP, EBX, ESI and EDI. Don't assume anything about the register state when the called function returns -- beside the segment registers and the stack pointer to be still the same as before the call. Change-Id: I383d6ccefc5b3d5cca37a1c9b638c231bbc48aa8 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18335 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-02-17libpayload: x86/main - propagate return value of main()Mathias Krause
According to coreboot’s payload API [1], the called payload should be able to return a value via %eax. Support this by changing the prototype of start_main() and pass on the return value of main() to the caller instead of discarding it. [1] https://www.coreboot.org/Payload_API Change-Id: I8442faea19cc8e04487092f8e61aa4e5cba3ba76 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18334 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-17libpayload: x86/exec - fix argc/argv value passingMathias Krause
According to coreboot’s payload API [1] the argc value should be passed at stack offset 0x10, so we need to push a dummy value to comply to the API. [1] https://www.coreboot.org/Payload_API Change-Id: Id20424185a5bf7e4d94de1886a2cece3f3968371 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18333 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-15libpayload: x86/exec - fix return value passingMathias Krause
The pointer to write the return value to is in %ecx, not %eax. Writing to (%eax) leads to memory corruptions as %eax holds the return value, e.g. would write zero to address zero for a "successful" returning payload. Change-Id: I82df27ae89a9e3d25f479ebdda2b50ea57565459 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18332 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 13:52:15 +0000