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2017-05-01cbgfx: Add portrait screen supportNickey Yang
cbgfx currently does not support portrait screen which height >width. so add it. Change-Id: I66fee6d73654e736a2db4a3d191f030c52a23e0d Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Reviewed-on: https://review.coreboot.org/19474 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-04-29libpayload/gdb: fix unused variable warningPatrick Georgi
input_underrun is defined but not used. A reasonably new compiler, enabled warnings and warnings-as-error make the build break for no good reason. Change-Id: Ibeb7ba53aad5738938093ab7b34695c9c99c9afe Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/19482 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-04-20Turn CBMEM console into a ring buffer that can persist across rebootsJulius Werner
This patch allows the CBMEM console to persist across reboots, which should greatly help post factum debugging of issues involving multiple reboots. In order to prevent the console from filling up, it will instead operate as a ring buffer that continues to evict the oldest lines once full. (This means that if even a single boot doesn't fit into the buffer, we will now drop the oldest lines whereas previous code would've dropped the newest lines instead.) The console control structure is modified in a sorta backwards-compatible way, so that new readers can continue to work with old console buffers and vice versa. When an old reader reads a new buffer that has already once overflowed (i.e. is operating in true ring buffer mode) it will print lines out of order, but it will at least still print out the whole console content and not do any illegal memory accesses (assuming it correctly implemented cursor overflow as it was already possible before this patch). BUG=chromium:651966 TEST=Rebooted and confirmed output repeatedly on a Kevin and a Falco. Also confirmed correct behavior across suspend/resume for the latter. Change-Id: Ifcbf59d58e1ad20995b98d111c4647281fbb45ff Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18301 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-19libpayload/libc/console: Flush input driver buffer on initFurquan Shaikh
When console input driver registers itself, perform flush of input buffer to avoid interpreting any stale key presses before libpayload is run. keyboard.c: Remove the redundant buffer flush. 8250.c: Ensure that serial_hardware_is_present is set before call to add input driver. BUG=b:37273808 TEST=Verified that any key presses in serial console before payload is up do not have any effect after the payload starts running. Change-Id: I46f1b6715ccf6418f5b2c741bf90db2ece26a60d Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-17libpayload: cbgfx: Show square images on portrait displaysJulius Werner
CBGFX currently doesn't support portrait screens at all. This will have to be fixed eventually but might take a bit of effort. As a first step to make devices with a portrait panel somewhat usable, this patch will just force a square canvas on these panels and keep the bottom part of the screen black. Also switch set_pixel to calculate framebuffer position via bytes_per_line instead of x_resolution. This is supposed to be the canonical way to do that and may differ in cases where the display controller requires a certain alignment from framebuffer lines. Change-Id: I47dd3bf95ab8a7d8b7e1913e0ddab346eedd46f1 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19279 Tested-by: build bot (Jenkins) Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2017-04-17payloads/seabios: Update stable from 1.10.1 to 1.10.2Paul Menzel
SeaBIOS 1.10.2 was released on February 28th, 2017 [1][2] with the changes below. ``` $ git log --oneline rel-1.10.1..rel-1.10.2 5f4c7b1 QEMU fw_cfg: Write fw_cfg back on S3 resume c45ca70 QEMU fw_cfg: Add functions for accessing files by key 31b6229 QEMU fw_cfg: Add command to write back address of file aa7219d romfile-loader: Switch to using named structs 2a1d88c QEMU DMA: Add DMA write capability d2ac564 ps2port: Disable keyboard/mouse prior to resetting ps2 controller b0e3c67 vgasrc: Increase debug level ca3ab93 ahci: Set upper 32-bit registers to zero ``` This fixes the problem on a Lenovo X60, that the keyboard is not initialized by SeaBIOS when for example loaded from GRUB. [1] https://www.seabios.org/Releases#SeaBIOS_1.10.2 Change-Id: Idc078ffa896b2e105faabd2d8befeaf9a2a0b6ac Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/19290 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-14payloads/external/depthcharge: Update stable commit idMartin Roth
Update from commit 124af94f - Fri Feb 26, 2016 (skylake boards: unconditionally re-enable 8254 PIT for legacy) To commit eb583fa8 - Wed Mar 29, 2017 (rk3399_sdhci: Reintroduce PHY power-cycling at 52MHz) This brings the stable version of depthcharge forward by 325 commits. Change-Id: I31b3235df6d36409ff1b365e6adb6852281df097 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/19220 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-14payloads/external/iPXE: Update stable versionMartin Roth
Update from commit 2afd66eb - Fri Jul 29, 2016 ([pixbuf] Enable PNG format by default) To commit fd6d1f46 - Fri Mar 31, 2017 ([thunderx] Use ThunderxConfigProtocol to obtain board configuration) This moves the stable iPXE commit forward 144 commits. Change-Id: Ia0c97f863be39632c9206ca95b3857047fc37e26 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/19221 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-07libpayload: Add gru configPaul Kocialkowski
This adds a gru libpayload config, that should fit all gru-based devices such as kevin. As gru-based devices are CrOS devices, select the associated config to enable CrOS-specific features. Change-Id: I6e79b763fc497c126612b8786a669a33b57ea29f Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/19137 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-03-19tint: Add USB supportNicola Corna
Enable the USB during the initialization of tint. Without it USB keyboards don't work, which makes this payload pointless on systems where a PS/2 keyboard port isn't available. Based on I98f0ccdb19d6b195572941cf87ce3221f57db7c5 (tint and nvramcui: enable USB, update tint to 0.04+nmu1 with changes) [1] [1] https://review.coreboot.org/17507/ Change-Id: Iaa8dfac0301ef19a2d76a0975d025b00e7f3807b Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18766 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-15libpayload: usbhub: Force enumeration of all connected ports on initJulius Werner
We have found a non-compliant USB hub (RealTek RTS 5413) that does not set a port's Connect Status Change bit on its USB 3.0 half if the port had already been connected while the hub was being reset. To work around this bug, this patch adds code to initially request the status of every port after a hub was enumerated, clear the Connect Status Change bit if set, and then enumerate the port iff it is currently connected, regardless of whether the change bit was set. A similar behavior can also be found in the Linux kernel. BRANCH=oak BUG=b:35929438 TEST=Booted Elm with this change, my USB 3.0 sticks enumerate now even if they had been plugged in since boot. Change-Id: I8a28252eb94f005f04866d06e4fc61ea265cee89 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/18729 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-13nvramcui: Add USB supportNicola Corna
Enable the USB during the initialization of nvramcui. Without it the USB keyboards don't work, which makes this payload pointless on the systems where a PS/2 keyboard port isn't available. Based on https://review.coreboot.org/#/c/17507/ Change-Id: I04697c5f582b41e6f6ffe98955bf59f4fe57f66e Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18765 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-03-08libpayload-x86: Enable SSE and FPU when presentPatrick Rudolph
Allows to use SSE and floating point in payloads without digging to much into x86 assembly code. Tested on Lenovo T500 (Intel Core2Duo). Both floating point operation and SSE is properly working. Change-Id: I4a5fc633f158de421b70435a8bfdc0dcaa504c72 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18345 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-02-28payloads/seabios: Add support for Hudson UARTRicardo Ribalda Delgado
Since version 9332965 "serialio: Support for mmap serial ports", SeaBIOS supports memory mapped serial ports. This patch automatically configures SeaBIOS when the Hudson UART is enabled. Change-Id: I072f6a957df7e143d790783546b0725bcd597d9c Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-on: https://review.coreboot.org/18025 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-02-24payloads/external/GRUB2: Add "git revision" to the GRUB2 version menuDenis 'GNUtoo' Carikli
This change is based on the following commit: 3aa91dc payloads/seabios: Add "git revision" to the SeaBIOS version menu Change-Id: I9987e3673e70b5cb20173d1ddff6060f42a5374a Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: https://review.coreboot.org/18352 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-23libpayload: Add oak configPaul Kocialkowski
This adds an oak libpayload config, that should fit all oak-based devices such as elm. Change-Id: Iabb71404ff84029a5976371a353e8c92e781ca1f Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/18447 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-02-17grub: Build module `boottime`Paul Menzel
Configure GRUB to build with boot time statistics. That allows users to add that module to GRUB by adding `boottime` to the list of extra modules. Change-Id: I76a07e49aecb37652fe8c7d6a9421fd464424287 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/18367 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-02-17libpayload: multiboot - support meminfo flagMathias Krause
Some simple implementation of the MultiBoot protocol may not pass a memory map (MULTIBOOT_FLAGS_MMAP missing in the flags) but just the two values for low and high memory, indicated by the MULTIBOOT_FLAGS_MEMINFO flag. Support those kind of boot loaders too, instead of falling back to the hard-coded values in lib_get_sysinfo(). Tested with a multiboot enhanced version of FILO. Change-Id: I22cf9e3ec0075aff040390bd177c5cd22d439b81 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18350 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-02-17libpayload: x86/head - implement argc/argv handlingMathias Krause
Implement the argc/argv passing as described in coreboot’s payload API: http://www.coreboot.org/Payload_API While at it, give the code some love by not needlessly trashing register values. Change-Id: Ib830f2c67b631b7216843203cefd55d9bb780d83 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18336 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-02-17libpayload: x86/exec - simplify and robustify the codeMathias Krause
Simplify the code by directly using the arguments on the stack as base pointer relative memory references, instead of loading them into intermediate registers first. Make it more robust by preserving all callee saved registers mandated by the C calling convention (and only those), namely EBP, EBX, ESI and EDI. Don't assume anything about the register state when the called function returns -- beside the segment registers and the stack pointer to be still the same as before the call. Change-Id: I383d6ccefc5b3d5cca37a1c9b638c231bbc48aa8 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18335 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2017-02-17libpayload: x86/main - propagate return value of main()Mathias Krause
According to coreboot’s payload API [1], the called payload should be able to return a value via %eax. Support this by changing the prototype of start_main() and pass on the return value of main() to the caller instead of discarding it. [1] https://www.coreboot.org/Payload_API Change-Id: I8442faea19cc8e04487092f8e61aa4e5cba3ba76 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18334 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-17libpayload: x86/exec - fix argc/argv value passingMathias Krause
According to coreboot’s payload API [1] the argc value should be passed at stack offset 0x10, so we need to push a dummy value to comply to the API. [1] https://www.coreboot.org/Payload_API Change-Id: Id20424185a5bf7e4d94de1886a2cece3f3968371 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18333 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-15libpayload: x86/exec - fix return value passingMathias Krause
The pointer to write the return value to is in %ecx, not %eax. Writing to (%eax) leads to memory corruptions as %eax holds the return value, e.g. would write zero to address zero for a "successful" returning payload. Change-Id: I82df27ae89a9e3d25f479ebdda2b50ea57565459 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18332 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-15libpayload: x86/exec - fix libpayload API magic valueMathias Krause
According to coreboot’s payload API [1] the magic value passed to the payload should be 0x12345678, not 12345678. Fix that. [1] https://www.coreboot.org/Payload_API Change-Id: I10a7f7b1a4aec100416c5e7e4ba7f8add10ef5c5 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: https://review.coreboot.org/18331 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-01payloads/depthcharge: Allow generic libpayload configMarshall Dawson
Change depthcharge to not require a board-specific config file for libpayload. If the Kconfig option is selected, use the settings in libpayload/configs/defconfig instead. Change-Id: I4fd1a5915472f28e757c62f3f2415716f1fdfc71 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18271 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01payloads/depthcharge: Specify revision to buildMarshall Dawson
Add the capability for specifying which version of depthcharge to checkout and build. This is similar to the existing feature for SeaBIOS. The depthcharge makefile already contains some structure for checking out master vs. stable however the calling Makefile.inc ingored this feature. Add the command-line variable assignment for these, along with a tree-ish for any revision. Change-Id: I99a5b088cb0ebb29e5d96a84217b3bfa852de8ac Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18270 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01payloads/depthcharge: Use variable target nameMarshall Dawson
Depending on the commit to build, depthcharge may have a different target name (depthcharge vs. depthcharge_unified). Add some logic to determine which name should be used based on the commit ID being requested. Change-Id: I05b853934d13696f4bd0d79d53ff6c5f59096d1c Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18269 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01payloads/depthcharge: Change make target from unifiedMarshall Dawson
Drop the _unified moniker from the depthcharge build. The payload and coreboot have drifted out of sync and there is no longer a non-unified depthcharge. This patch corresponds with the depthcharge change: https://review.coreboot.org/cgit/depthcharge.git/commit/?id=74a0739 Change-Id: I8d028b14d2eee63dfdc9d3dd63695f1c58ea7984 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/18268 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-27SeaBIOS Kconfig: Update loggingMartin Roth
The SeaBIOS and coreboot log levels don't really align, so setting the SeaBIOS log level to the same as coreboot's isn't really what we want. - Update default log level to use the default SeaBIOS log level. - Update the current help text to match the new defaults. - Add help text for what is displayed at various levels. - Get rid of separate type & prompt lines. - Add comments for default seabios level & logging disabled Change-Id: I5a8b75bd44748cb94a83a77ac3a379c8a9587e7b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/18210 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
2017-01-25libpayload: fix buildPatrick Georgi
When .xcompile doesn't already exist, building libpayload fails because the CC variable (et al) remain empty since .xcompile is only included after the variables coming from there are evaluated. Change-Id: I73f1cbced95afcff15839604fea5fd05d81bc3d3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/18228 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-25nvramcui: Declare variable outside for loopPaul Menzel
Make the code C89 compatible, which doesn’t allow loop initial declarations. Older compilers use C89 by default, so just declare the variable outside. Change-Id: I3c5a8109e66f7a25687f4e4b2c72718d74276e04 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/18196 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-01-24build system: don't run xcompile or git for %clean/%config targetsPatrick Georgi
It takes a long time for no gain: We don't need to update the submodules, we don't need to fetch the revision, we don't need to find the compilers, when all we want to do is to manipulate the .config file or clean the build directory. Change-Id: Ie1bd446a0d49a81e3cccdb56fe2c43ffd83b6c98 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/18182 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-24libpayload: drivers/keyboard: report power button eventsShelley Chen
Power button events are usually dropped because the button is not in the keyboard matrix range. Add condition to forward it like other keys. BUG=chrome-os-partner:61275 BRANCH=None TEST=reboot and make sure power button selection in depthcharge's detachable menus is processed on reef. Change-Id: I86897fa8d73a56533ef62bba05458ac3d339237e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 25654e214f0ab8685d445ced62612a02be851126 Original-Change-Id: I516a0043bd7730789728d5c5498d0a0f30a2acac Original-Signed-off-by: Shelley Chen <shchen@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/428199 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://review.coreboot.org/18177 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-19libpayload: Enable USB HID in veyron configurationPaul Kocialkowski
This enables USB HID support in the veyron config, since it seems to work correctly and is needed for interaction with depthcharge on devices without an embedded keyboard (such as veyron_mickey). Change-Id: Icae829e3a132005df17bcb6f7e6f8a190912576d Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17930 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-01-17SeaBIOS: Add Kconfig option to set verbosity levelStefan Tauner
Previously SeaBIOS's default was used (1). This patch defaults to coreboot's console level instead which is approximately the same verbosity as SeaBIOS and thus what a user would probably expect. Change-Id: If79e5f40c9380bb527f870eeb7d0cb43faf00beb Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/18051 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-13libpayload: usb: Reset ohci controller when trying to shutdown ohciJeffy Chen
Currently we just disabled ohci interrupts when calling ohci_shutdown, Which would not actually shutdown the ohci controller, for example it may still written the increased HccaFrameNumber to Hcca buffer. Perform a soft reset to ohci controller as the linux kernel ohci-hcd driver does. BUG=chrome-os-partner:60996 BRANCH=None TEST=Checked on gru, no more "BUG: Bad page state" error in kernel. Change-Id: I128ab6ba455ac5383a4d48be0bc12b8bb4533464 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4749fc82fdd1b74ca3f2ed3fdf0ef53a5e161087 Original-Change-Id: I3f192aea627ba2fa69533bc0a4270466ca18f2a7 Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/426338 Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://review.coreboot.org/18125 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-13libpayload: Add VPD address into lib_sysinfoKan Yan
BUG=chrome-os-partner:56947 TEST=Verifed country code can be parsed from VPD in depthcharge. BRANCH=None Change-Id: I2fbbd4a784c50538331747e1ef78c33c6b8a679b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: acea6e2a200e8bd78fd458255ac7fad307406989 Original-Change-Id: I4616fefc6a377d7830397cdadb493927358e25cc Original-Signed-off-by: Kan Yan <kyan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/425819 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/18124 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-13libpayload: Update ARM CrOS devices configurationPaul Kocialkowski
This updates the configuration for ARM CrOS devices (nyans and veyrons) by using the CHROMEOS Kconfig option, thus reducing the number of options to select. It also brings proper serial console support. Change-Id: Iffc84c44a1d339c5bb575fbaffc40bc2d56bb6cf Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17928 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-01-10payloads/GRUB2: Add Kconfig options for grub.cfgDenis 'GNUtoo' Carikli
Change-Id: I5480d6a5f2a6bbae4222e05bbe92eb717e1aff65 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Martin Roth <martinroth@google.com> Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/5109 Tested-by: build bot (Jenkins)
2017-01-06libpayload: usb: handle situation with no free device addressPatrick Georgi
Change-Id: I1308bdca90f1a09d980f384ee85552198a39b965 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1260940 Reviewed-on: https://review.coreboot.org/18036 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06libpayload: xhci: plug leakPatrick Georgi
Change-Id: Ia163872846906c6c78144a984a405812f856f626 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1325835 Reviewed-on: https://review.coreboot.org/18035 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06libpayload: timer: cast cpu_khz to make sure 64bit math is usedPatrick Georgi
Change-Id: Iaf84de2330b433076a66c22fa72ffb45e957c0dc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1261177 Reviewed-on: https://review.coreboot.org/18034 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06payloads/external/SeaBIOS: Bump version to 1.10.1Philipp Deppenwiese
Changes since SeaBIOS 1.9.3 Release 1.10.0: * Initial support for Trusted Platform Module (TPM) version 2.0 * Several USB XHCI timing fixes on real hardware * Support for "LSI MPT Fusion" scsi controllers on QEMU * Support for virtio devices mapped above 4GB * Several bug fixes and code cleanups Release 1.10.1: * Updates for QEMU for reproducible builds Change-Id: I465700307d72fa44b6900b38b332603ea505ed09 Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/18026 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-29payloads/external: Download FILO over HTTPSJonathan Neuschäfer
Change-Id: I1b44e32505b96978849d39764ff399a502fa6e84 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/17972 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-12-29payloads/external: Download iPXE over HTTPSJonathan Neuschäfer
Change-Id: Ie4979ab8491ee821b39a273c5f354c445105d2a4 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/17971 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-12-21libpayload: Get current tick from high register in generic timerPaul Kocialkowski
This fixes the generic timer driver to get the current tick from the high register, so that comparison with the high count value (obtained previously from the same register) has a chance to succeed. Change-Id: I5ce02bfa15a91ad34641b8e24813a5b7ca790ec3 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/17929 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-12-14libpayload/drivers/video: Improve check in if conditionPatrick Georgi
Coverity considers this a copy&paste error, and maybe it is. In any case, it makes sense to check the variable that (if the condition is true) is changed, and the values are the same before that test, so the change is harmless. Change-Id: I163c6a9f5baa05e715861dc19643b19a9c79c883 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1347376 Reviewed-on: https://review.coreboot.org/17837 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-14libpayload/.../PDCurses: Improve compatibility with ncursesPatrick Georgi
Coverity erroneously complains that we call wmove with x or y == -1, even though our copy of that function properly checks for that. But: setsyx is documented to always return OK (even on errors), so let it do that. (and make coverity happy in the process) Change-Id: I1bc9ba2a075037f0e1a855b67a93883978564887 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1260797 Reviewed-on: https://review.coreboot.org/17836 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-14libpayload/.../PDCurses: avoid reading orig before NULL checking itPatrick Georgi
Coverity complains and that (unfortunately) means that some compiler might take advantage of the same fact. Change-Id: I59aff77820c524fa5a0fcb251c1268da475101fb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1261105 Reviewed-on: https://review.coreboot.org/17835 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-08libpayload: Add Cougar Point PCH's AHCI to whitelistNico Huber
Change-Id: Ie8ca342a32323be4c26c236a5209052ec724317f Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17353 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 12:16:40 +0000