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path: root/src/arch/arm64/include/armv8
AgeCommit message (Expand)Author
2015-11-11arm64: mmu: Make page table manipulation work across stagesJulius Werner
2015-11-07arm64: Remove cpu intialization through device-treeFurquan Shaikh
2015-11-07arm64: Remove SMP supportFurquan Shaikh
2015-11-07arm64: remove ARCH_ARM64_CORTEX_A57_POWER_DOWN_SUPPORTAaron Durbin
2015-11-07arm64: remove secmonAaron Durbin
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-28arm64: mmu: Prevent CPU prefetch instructions from device memoryJimmy Huang
2015-06-02arm64: Decouple MMU functions from memrangesJulius Werner
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-19arm64: Make SPSR exception masking on EL2 transition explicitJulius Werner
2015-05-19arm64: Reorganize payload entry code and related KconfigsJulius Werner
2015-04-27arch/arm64: update mmu translation table granule size, logic and macrosJimmy Huang
2015-04-27arm64: save/restore cptr_el3 and cpacr_el1 registersJoseph Lo
2015-04-27arm64: implement CPU power down sequence as per A57/A53/A72 TRMJoseph Lo
2015-04-27arm64: introduce data cache ops by set/way to the level specifiedJoseph Lo
2015-04-22arm64: save and restore cntfrq for secondary cpusJimmy Huang
2015-04-22arm64: add arm64_arch_timer_init functionJoseph Lo
2015-04-22arm64: Correct shareability option for normal memoryFurquan Shaikh
2015-04-22arch/arm64: allow floating-point registers accessYen Lin
2015-04-22arm64: provide icache_invalidate_all()Aaron Durbin
2015-04-21Unify byte order macros and clrsetbitsJulius Werner
2015-04-21arm(64): Change write32() argument order to match x86Julius Werner
2015-04-10arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh
2015-04-10arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh
2015-04-10arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh
2015-04-10arm64: Add function for reading TCR register at current ELFurquan Shaikh
2015-04-10arm64: secmon: add entry point for turned on CPUsAaron Durbin
2015-04-10arm64: secmon: pass online CPUs to secmonAaron Durbin
2015-04-10arm64: secmon: prepare for passing more state into secmonAaron Durbin
2015-04-09arm64: add mpidr field to cpu_info structAaron Durbin
2015-03-28arm64: remove EL and mode from secmon_paramsAaron Durbin
2015-03-28arm64: split cpu.cAaron Durbin
2015-03-28arm64: exception handler registrationAaron Durbin
2015-03-28arm64: add cpu_is_bsp() conceptAaron Durbin
2015-03-28arm64: provide run on all cpu but self semanticsAaron Durbin
2015-03-28arm64: Add support for secure monitorFurquan Shaikh
2015-03-28arm64: initialize SCR_EL3 on all CPUsAaron Durbin
2015-03-28arm64: Make exceptions use the transition libraryFurquan Shaikh
2015-03-28arm64: Add useful macro definitions for register bitsFurquan Shaikh
2015-03-28arm64 libhelpers: Add helper functions for writing sp_elxFurquan Shaikh
2015-03-28arm64 libhelpers: Add helper functions with el argumentFurquan Shaikh
2015-03-28arm64: Add support for read and write registers at current EL in assemblyFurquan Shaikh
2015-03-27arm64: remove soc_secondary_cpu_init()Aaron Durbin
2015-03-27arm64: add devicetree based CPU startupAaron Durbin
2015-03-27arm64: split cpu.h headerAaron Durbin
2015-03-27arm64: add spinlock implementationAaron Durbin
2015-03-27arm64: move spinlock.h to proper placeAaron Durbin
2015-03-27arm64: add more barrier supportAaron Durbin
2015-03-27arm64: add midr_el1 accessor functionAaron Durbin
2015-03-27arm64: provide API for coordinating secondary CPU bringupAaron Durbin
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