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path: root/src/arch/arm64/include
AgeCommit message (Expand)Author
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-08-28arm64: declare do_dcsw_op as functionJimmy Huang
2015-07-29arm, arm64, mips: Add rough static stack size checks with -Wstack-usageJulius Werner
2015-07-13arm64: Define stage_entry as weak symbolFurquan Shaikh
2015-07-13arm64/a57: Move cortex_a57.h under include directoryFurquan Shaikh
2015-06-09cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() APIKyösti Mälkki
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-06-02arm64: Decouple MMU functions from memrangesJulius Werner
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-19arm64: Make SPSR exception masking on EL2 transition explicitJulius Werner
2015-05-19arm64: Add support for using ARM Trusted Firmware as secure monitorJulius Werner
2015-05-19arm64: Reorganize payload entry code and related KconfigsJulius Werner
2015-05-19arm64: Reorganize payload entry code and related KconfigsJulius Werner
2015-05-18arm64: psci: add cpu_suspend supportJoseph Lo
2015-04-27arch/arm64: update mmu translation table granule size, logic and macrosJimmy Huang
2015-04-27arm64: save/restore cptr_el3 and cpacr_el1 registersJoseph Lo
2015-04-27arm64: implement CPU power down sequence as per A57/A53/A72 TRMJoseph Lo
2015-04-27arm64: introduce data cache ops by set/way to the level specifiedJoseph Lo
2015-04-22armv8/secmon: Correct PSCI function idsFurquan Shaikh
2015-04-22arm64: save and restore cntfrq for secondary cpusJimmy Huang
2015-04-22arm64: add arm64_arch_timer_init functionJoseph Lo
2015-04-22arm64: Correct shareability option for normal memoryFurquan Shaikh
2015-04-22arch/arm64: allow floating-point registers accessYen Lin
2015-04-22arm64: provide icache_invalidate_all()Aaron Durbin
2015-04-21Unify byte order macros and clrsetbitsJulius Werner
2015-04-21arm(64): Change write32() argument order to match x86Julius Werner
2015-04-10arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh
2015-04-10arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh
2015-04-10arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh
2015-04-10arm64: Add function for reading TCR register at current ELFurquan Shaikh
2015-04-10arm64: Implement PSCI command supportAaron Durbin
2015-04-10arm64: secmon: add entry point for turned on CPUsAaron Durbin
2015-04-10arm64: secmon: pass online CPUs to secmonAaron Durbin
2015-04-10arm64: psci: use struct cpu_action to track startup entryAaron Durbin
2015-04-10arm64: secmon: prepare for passing more state into secmonAaron Durbin
2015-04-09arm64: psci: add node hierarchyAaron Durbin
2015-04-09arm64: add mpidr field to cpu_info structAaron Durbin
2015-04-07arm: Include types.h in clock.hPatrick Georgi
2015-04-06New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner
2015-03-28arm64: remove EL and mode from secmon_paramsAaron Durbin
2015-03-28arm64: add psci support to secmonAaron Durbin
2015-03-28arm64: add smc layer to secmonAaron Durbin
2015-03-28arm64: provide entry points for BSP and non-BSPAaron Durbin
2015-03-28arm64: split cpu.cAaron Durbin
2015-03-28arm64: exception handler registrationAaron Durbin
2015-03-28arm64: add spin table supportAaron Durbin
2015-03-28arm64: add cpu_is_bsp() conceptAaron Durbin
2015-03-28arm64: provide run on all cpu but self semanticsAaron Durbin
2015-03-28arm64: Add support for secure monitorFurquan Shaikh
2015-03-28arm64: initialize SCR_EL3 on all CPUsAaron Durbin
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