coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-06-13	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	Furquan Shaikh
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-03-06	src/arch/riscv: Convert to SPDX license header	Patrick Georgi
2019-11-06	arch/riscv: Rename `stages.c` to `romstage.c`	Nico Huber
2019-11-05	arch/riscv: Don't link `stages.c` into ramstage	Nico Huber
2019-08-08	arch/riscv: Enable FIT support	Jonathan Neuschäfer
2019-08-03	riscv: add support for OpenSBI	Xiang Wang
2019-02-13	riscv: Add initial support for 32bit boards	Philipp Hug
2019-02-02	riscv: Simplify payload handling	Xiang Wang
2019-01-17	riscv: create Kconfig architecture features for new parts	Ronald G. Minnich
2018-11-05	riscv: add support for supervisor binary interface (SBI)	Xiang Wang
2018-11-05	riscv: add support smp_pause / smp_resume	Xiang Wang
2018-10-11	riscv: add physical memory protection (PMP) support	Xiang Wang
2018-10-04	arch/riscv: Adjust compiler flags for scan-build	Jonathan Neuschäfer
2018-09-14	arch/riscv: provide a monotonic timer	Philipp Hug
2018-09-10	riscv: update misaligned memory access exception handling	Xiang Wang
2018-09-05	riscv: add entry assembly file for RAMSTAGE	Xiang Wang
2018-08-01	riscv: remove redundancy in Makefile	Xiang Wang
2018-07-31	riscv: fix issues (timestrap & PRIu64)	Xiang Wang
2018-07-18	arch/riscv: Fix makefile to only set flags for riscv	Martin Roth
2018-07-17	riscv: add support for modifying compiler options	Xiang Wang
2018-02-20	arch/riscv: Make RVC support configurable	Jonathan Neuschäfer
2017-12-02	riscv: Remove config string support	Jonathan Neuschäfer
2017-12-02	arch/riscv: Remove the current SBI implementation	Jonathan Neuschäfer
2016-11-12	riscv: start to use the configstring functions	Ronald G. Minnich
2016-11-07	riscv: Unify SBI call implementations under arch/riscv/	Jonathan Neuschäfer
2016-10-24	RISCV: Clean up the common architectural code	Ronald G. Minnich
2016-08-23	arch/riscv: Implement the SBI again	Jonathan Neuschäfer
2016-07-28	arch/riscv: Refactor bootblock.S	Jonathan Neuschäfer
2016-07-14	spike-riscv: Look for the CBFS in RAM	Jonathan Neuschäfer
2016-06-12	arch/riscv: Compile with -mcmodel=medany	Jonathan Neuschäfer
2016-06-12	arch/riscv: Add misc.c to bootblock/romstage to get udelay()	Jonathan Neuschäfer
2016-05-03	build system: remove CBFSTOOL_PRE1_OPTS	Patrick Georgi
2016-03-09	Makefile: Add build-time overlap check for programs loaded after coreboot	Julius Werner
2016-01-28	Makefile: Make full use of src-to-obj macro	Nico Huber
2015-12-02	build system: Add more files through cbfs-files instead of manual rules	Patrick Georgi
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-16	riscv-memlayout: fix existing memlayout issues, add sbi interface	Thaminda Edirisooriya
2015-09-10	riscv-trap-handling: Add implementation for trap calls in riscv	Thaminda Edirisooriya
2015-09-09	linking: add and use LDFLAGS_common	Aaron Durbin
2015-07-22	riscv: Link in libgcc	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-20	build system: use archives, not linker action to shorten command lines	Patrick Georgi
2015-04-14	CBFS: Automate ROM image layout and remove hardcoded offsets	Julius Werner
2015-04-14	CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstool	Julius Werner
2015-04-06	New mechanism to define SRAM/memory map with automatic bounds checking	Julius Werner
2015-04-06	build system: run linker scripts through the preprocessor	Patrick Georgi
2015-04-04	build system x86: deprecate bootblock_lds and ldscripts variables	Patrick Georgi
2015-04-03	program loading: add prog_run() function	Aaron Durbin