Age | Commit message (Expand) | Author |
---|---|---|
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-03-20 | bootblocks: use run_romstage() | Aaron Durbin |
2014-12-01 | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich |
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index : coreboot | |
Some coreboot project code with my work | vimacs |
summaryrefslogtreecommitdiff |
Age | Commit message (Expand) | Author |
---|---|---|
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-03-20 | bootblocks: use run_romstage() | Aaron Durbin |
2014-12-01 | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich |