index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
riscv
/
include
Age
Commit message (
Expand
)
Author
2018-04-27
RISC-V boards: Remove PAGETABLES section from memlayout.ld
Jonathan Neuschäfer
2018-04-26
arch/riscv: Store mprv bit in size_t
Jonathan Neuschäfer
2018-04-11
arch/riscv: Remove I/O space access functions (outb, etc.)
Jonathan Neuschäfer
2018-02-20
arch/riscv: Update encoding.h and adjust related code
Jonathan Neuschäfer
2018-02-20
arch/riscv: Pass the bootrom-provided FDT to the payload
Jonathan Neuschäfer
2018-02-20
arch/riscv: Don't set up virtual memory
Jonathan Neuschäfer
2017-12-02
arch/riscv: Remove the current SBI implementation
Jonathan Neuschäfer
2017-11-23
Constify struct cpu_device_id instances
Jonathan Neuschäfer
2017-11-07
arch/riscv: mprv_read_*: Mark result as earlyclobber
Jonathan Neuschäfer
2017-11-07
arch/riscv: Fix return type of mprv_read_u64
Jonathan Neuschäfer
2017-09-27
arch/riscv: Document mprv_{read,write}_* functions
Jonathan Neuschäfer
2017-07-25
src/arch: Fix checkpatch warning: no spaces at the start of a line
Martin Roth
2017-07-07
arch/*: Update Kconfig symbol usage
Martin Roth
2017-05-30
arch: Unify basic cache clearing API
Julius Werner
2017-02-20
riscv: Suppress invalid coverity errors
Martin Roth
2017-01-16
riscv: Move mcall numbers to mcall.h, adjust their names
Jonathan Neuschäfer
2017-01-16
riscv: get SBI calls to work
Ronald G. Minnich
2016-12-18
riscv: Add support for timer interrupts
Ronald G. Minnich
2016-11-07
riscv: Unify SBI call implementations under arch/riscv/
Jonathan Neuschäfer
2016-10-24
RISCV: Clean up the common architectural code
Ronald G. Minnich
2016-10-15
riscv: Clean up {qemu,spike}_util
Jonathan Neuschäfer
2016-10-07
RISCV: update the encoding.h file.
Ronald G. Minnich
2016-09-12
src/arch: Improve code formatting
Elyes HAOUAS
2016-08-23
arch/riscv: Add functions to read/write memory on behalf of supervisor/user mode
Jonathan Neuschäfer
2016-08-23
arch/riscv: Implement the SBI again
Jonathan Neuschäfer
2016-08-23
arch/riscv: Print the page table structure after construction
Jonathan Neuschäfer
2016-08-11
arch/riscv: Update encoding.h and dependent files
Jonathan Neuschäfer
2016-08-02
arch/riscv: Add include/arch/barrier.h
Jonathan Neuschäfer
2016-07-28
arch/riscv: Remove spinlock code from atomic.h
Jonathan Neuschäfer
2016-07-19
arch/riscv: Enable unaligned load handling
Jonathan Neuschäfer
2016-07-18
arch/riscv: Remove enter_supervisor
Jonathan Neuschäfer
2016-06-12
arch/riscv: copy read/write8/16/32 from x86
Jonathan Neuschäfer
2016-05-02
lib/coreboot_table: use the architecture dependent table size
Aaron Durbin
2016-05-02
arch: introduce architecture dependent common variables
Aaron Durbin
2016-02-11
arches: lib: add main_decl.h for main() declaration
Aaron Durbin
2016-02-11
arch/{arm64,riscv}: remove jmp_to_elf_entry() declaration
Aaron Durbin
2016-02-11
arch: remove stage_exit()
Aaron Durbin
2016-01-18
arch/riscv: Add missing license headers
Martin Roth
2015-11-11
arm/arm64: Generalize bootblock C entry point
Julius Werner
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-16
riscv-memlayout: fix existing memlayout issues, add sbi interface
Thaminda Edirisooriya
2015-09-15
riscv-trap-handling: Add functionality, prevent stack corruption
Thaminda Edirisooriya
2015-09-10
riscv-trap-handling: Add implementation for trap calls in riscv
Thaminda Edirisooriya
2015-09-10
riscv-virtual-memory: Add virtual memory setup
Thaminda Edirisooriya
2015-08-26
riscv-trap-handling: Add preliminary trap handling for riscv
Thaminda Edirisooriya
2015-08-09
riscv-spike: support for Spike emulation of riscv
Thaminda Edirisooriya
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-21
Unify byte order macros and clrsetbits
Julius Werner
2015-04-06
New mechanism to define SRAM/memory map with automatic bounds checking
Julius Werner
[next]