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coreboot
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
hp820g1
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mec1322
Some coreboot project code with my work
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riscv
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2018-09-04
riscv: Add DEFINE_MPRV_READ_MXR to read execution-only page
Xiang Wang
2018-09-02
riscv: separately define stack locations at different stages
Xiang Wang
2018-08-30
riscv: update the definition of intptr_t/uintptr_t
Xiang Wang
2018-08-07
arch: Retire cache_sync_instructions() from <arch/cache.h> (except arm)
Julius Werner
2018-08-01
riscv: remove redundancy in Makefile
Xiang Wang
2018-07-31
riscv: fix issues (timestrap & PRIu64)
Xiang Wang
2018-07-30
riscv: delete src/arch/riscv/prologue.inc
Xiang Wang
2018-07-18
arch/riscv: Fix makefile to only set flags for riscv
Martin Roth
2018-07-18
riscv: add CAR interface
Xiang Wang
2018-07-17
riscv: add support for modifying compiler options
Xiang Wang
2018-07-12
riscv: add include/arch/smp/ directory
Xiang Wang
2018-07-11
riscv: add support to check ISA extension
Xiang Wang
2018-07-06
riscv: use __riscv_atomic to check support A extension
Xiang Wang
2018-04-27
RISC-V boards: Remove PAGETABLES section from memlayout.ld
Jonathan Neuschäfer
2018-04-26
arch/riscv: Store mprv bit in size_t
Jonathan Neuschäfer
2018-04-11
arch/riscv: Remove I/O space access functions (outb, etc.)
Jonathan Neuschäfer
2018-02-20
arch/riscv: Delegate the page fault exceptions
Jonathan Neuschäfer
2018-02-20
arch/riscv: Update encoding.h and adjust related code
Jonathan Neuschäfer
2018-02-20
arch/riscv: Pass the bootrom-provided FDT to the payload
Jonathan Neuschäfer
2018-02-20
arch/riscv: Don't set up virtual memory
Jonathan Neuschäfer
2018-02-20
arch/riscv: Make RVC support configurable
Jonathan Neuschäfer
2018-02-20
arch/riscv: Align trap_entry to 4 bytes, as required by spec
Jonathan Neuschäfer
2017-12-02
arch/riscv: Remove supervisor_trap_entry
Jonathan Neuschäfer
2017-12-02
riscv: Remove config string support
Jonathan Neuschäfer
2017-12-02
arch/riscv: Remove the current SBI implementation
Jonathan Neuschäfer
2017-12-02
arch/riscv: Return from trap_handler instead of jumping out
Jonathan Neuschäfer
2017-12-02
arch/riscv: Unify trap return
Jonathan Neuschäfer
2017-11-23
Constify struct cpu_device_id instances
Jonathan Neuschäfer
2017-11-07
arch/riscv: Use a separate trap stack
Jonathan Neuschäfer
2017-11-07
arch/riscv: gettimer: Don't use the config string
Jonathan Neuschäfer
2017-11-07
arch/riscv: Drop mret workaround
Jonathan Neuschäfer
2017-11-07
arch/riscv: mprv_read_*: Mark result as earlyclobber
Jonathan Neuschäfer
2017-11-07
arch/riscv: Fix return type of mprv_read_u64
Jonathan Neuschäfer
2017-09-27
arch/riscv: hls_init: Initialize time{,cmp} with dummy pointers
Jonathan Neuschäfer
2017-09-27
arch/riscv: Document mprv_{read,write}_* functions
Jonathan Neuschäfer
2017-09-27
arch/riscv: trap handler: Print load/store access width in bits
Jonathan Neuschäfer
2017-09-26
riscv: Update register address
wxjstz
2017-07-25
src/arch: Fix checkpatch warning: no spaces at the start of a line
Martin Roth
2017-07-07
arch/*: Update Kconfig symbol usage
Martin Roth
2017-06-07
src: change coreboot to lowercase
Martin Roth
2017-05-30
arch: Unify basic cache clearing API
Julius Werner
2017-02-20
riscv: Suppress invalid coverity errors
Martin Roth
2017-01-16
riscv: Move mcall numbers to mcall.h, adjust their names
Jonathan Neuschäfer
2017-01-16
riscv: get SBI calls to work
Ronald G. Minnich
2016-12-20
riscv: enable counters via m[us]counteren
Ronald G. Minnich
2016-12-18
riscv: Add support for timer interrupts
Ronald G. Minnich
2016-12-06
riscv: Stub out sbi_(un)mask_interrupt
Jonathan Neuschäfer
2016-12-06
arch/riscv/mcall.c: Return the correct memory base and size
Jonathan Neuschäfer
2016-11-20
riscv: map first 4GiB of physical address space
Ronald G. Minnich
2016-11-14
riscv: add a variable to control trap management
Ronald G. Minnich
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