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Some coreboot project code with my work
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riscv
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2018-10-06
arch/riscv: Update comment about mstatus initialization
Jonathan Neuschäfer
2018-10-04
arch/riscv: Adjust compiler flags for scan-build
Jonathan Neuschäfer
2018-09-26
arch/riscv: Advance the PC after handling misaligned load/store
Jonathan Neuschäfer
2018-09-21
arch/riscv/include/arch: Don't use device_t
Elyes HAOUAS
2018-09-16
riscv: don't write to mstatus.XS
Xiang Wang
2018-09-15
arch/riscv: Configure delegation only if S-mode is supported
Jonathan Neuschäfer
2018-09-14
arch/riscv: Only execute on hart 0 for now
Philipp Hug
2018-09-14
arch/riscv: provide a monotonic timer
Philipp Hug
2018-09-14
arch/riscv: add missing endian.h header to io.h
Philipp Hug
2018-09-14
complier.h: add __always_inline and use it in code base
Aaron Durbin
2018-09-10
riscv: update misaligned memory access exception handling
Xiang Wang
2018-09-10
riscv: update mtime initialization
Xiang Wang
2018-09-05
riscv: add entry assembly file for RAMSTAGE
Xiang Wang
2018-09-05
riscv: add support to check machine length at runtime
Xiang Wang
2018-09-04
riscv: add spin lock support
Xiang Wang
2018-09-04
riscv: Add DEFINE_MPRV_READ_MXR to read execution-only page
Xiang Wang
2018-09-02
riscv: separately define stack locations at different stages
Xiang Wang
2018-08-30
riscv: update the definition of intptr_t/uintptr_t
Xiang Wang
2018-08-07
arch: Retire cache_sync_instructions() from <arch/cache.h> (except arm)
Julius Werner
2018-08-01
riscv: remove redundancy in Makefile
Xiang Wang
2018-07-31
riscv: fix issues (timestrap & PRIu64)
Xiang Wang
2018-07-30
riscv: delete src/arch/riscv/prologue.inc
Xiang Wang
2018-07-18
arch/riscv: Fix makefile to only set flags for riscv
Martin Roth
2018-07-18
riscv: add CAR interface
Xiang Wang
2018-07-17
riscv: add support for modifying compiler options
Xiang Wang
2018-07-12
riscv: add include/arch/smp/ directory
Xiang Wang
2018-07-11
riscv: add support to check ISA extension
Xiang Wang
2018-07-06
riscv: use __riscv_atomic to check support A extension
Xiang Wang
2018-04-27
RISC-V boards: Remove PAGETABLES section from memlayout.ld
Jonathan Neuschäfer
2018-04-26
arch/riscv: Store mprv bit in size_t
Jonathan Neuschäfer
2018-04-11
arch/riscv: Remove I/O space access functions (outb, etc.)
Jonathan Neuschäfer
2018-02-20
arch/riscv: Delegate the page fault exceptions
Jonathan Neuschäfer
2018-02-20
arch/riscv: Update encoding.h and adjust related code
Jonathan Neuschäfer
2018-02-20
arch/riscv: Pass the bootrom-provided FDT to the payload
Jonathan Neuschäfer
2018-02-20
arch/riscv: Don't set up virtual memory
Jonathan Neuschäfer
2018-02-20
arch/riscv: Make RVC support configurable
Jonathan Neuschäfer
2018-02-20
arch/riscv: Align trap_entry to 4 bytes, as required by spec
Jonathan Neuschäfer
2017-12-02
arch/riscv: Remove supervisor_trap_entry
Jonathan Neuschäfer
2017-12-02
riscv: Remove config string support
Jonathan Neuschäfer
2017-12-02
arch/riscv: Remove the current SBI implementation
Jonathan Neuschäfer
2017-12-02
arch/riscv: Return from trap_handler instead of jumping out
Jonathan Neuschäfer
2017-12-02
arch/riscv: Unify trap return
Jonathan Neuschäfer
2017-11-23
Constify struct cpu_device_id instances
Jonathan Neuschäfer
2017-11-07
arch/riscv: Use a separate trap stack
Jonathan Neuschäfer
2017-11-07
arch/riscv: gettimer: Don't use the config string
Jonathan Neuschäfer
2017-11-07
arch/riscv: Drop mret workaround
Jonathan Neuschäfer
2017-11-07
arch/riscv: mprv_read_*: Mark result as earlyclobber
Jonathan Neuschäfer
2017-11-07
arch/riscv: Fix return type of mprv_read_u64
Jonathan Neuschäfer
2017-09-27
arch/riscv: hls_init: Initialize time{,cmp} with dummy pointers
Jonathan Neuschäfer
2017-09-27
arch/riscv: Document mprv_{read,write}_* functions
Jonathan Neuschäfer
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