summaryrefslogtreecommitdiff
path: root/src/arch/riscv
AgeCommit message (Expand)Author
2021-02-07src: Remove redundant include <rules.h>Elyes HAOUAS
2020-08-27symbols: Change implementation details of DECLARE_OPTIONAL_REGION()Julius Werner
2020-08-24src/arch: Drop unneeded empty linesElyes HAOUAS
2020-08-18src: Remove unused 'include <stddef.h>Elyes HAOUAS
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-02src: Remove unused '#include <cbfs.h>'Elyes HAOUAS
2020-05-18src: Remove unused 'include <lib.h>'Elyes HAOUAS
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-13src: Remove unused '#include <stdint.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-03-06src/arch/riscv: Convert to SPDX license headerPatrick Georgi
2020-01-28commonlib: Add commonlib/bsdJulius Werner
2019-12-19src/arch: Remove unused <stdlib.h>Elyes HAOUAS
2019-11-30arch/*/*/early_variables.h: drop unused filesArthur Heymans
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-10lib/Kconfig: Remove RAMSTAGE_CBMEM_TOP_ARGArthur Heymans
2019-11-10arch/riscv: Pass cbmem_top to ramstage via calling argumentArthur Heymans
2019-11-06arch/riscv: Use FDT from calling argument when using FITArthur Heymans
2019-11-06arch/riscv: Rename `stages.c` to `romstage.c`Nico Huber
2019-11-05arch/riscv: Don't link `stages.c` into ramstageNico Huber
2019-10-20src: Remove unused 'include <string.h>'Elyes HAOUAS
2019-09-09arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0Kyösti Mälkki
2019-08-26arch/non-x86: Use ENV_ROMSTAGE_OR_BEFOREKyösti Mälkki
2019-08-20arch/non-x86: Remove use of __PRE_RAM__Kyösti Mälkki
2019-08-08arch/riscv: Enable FIT supportJonathan Neuschäfer
2019-08-03riscv: add support for OpenSBIXiang Wang
2019-07-28riscv: Remove unused headersPatrick Rudolph
2019-07-12arch, include, soc: Use common stdint.hJacob Garber
2019-07-02arch/riscv: Make RISCV specific options depend on ARCH_RISCVArthur Heymans
2019-06-28arch/riscv/mcall: Drop debug codePatrick Rudolph
2019-06-23riscv: workaround selfboot putting the coreboot table into prog_entry_argXiang Wang
2019-06-23riscv: use mret to invoke M-mode payload and disable interruptsXiang Wang
2019-06-23riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengthsXiang Wang
2019-06-04arch/riscv/Kconfig: Make correct default value for CONFIG_ARCH_RISCV_MSubrata Banik
2019-04-23src: Use include <console/console.h> when appropriateElyes HAOUAS
2019-04-23src: Add missing include 'console.h'Elyes HAOUAS
2019-03-20src: Use 'include <string.h>' when appropriateElyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04arch/io.h: Separate MMIO and PNP opsKyösti Mälkki
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-02-13riscv: Add initial support for 32bit boardsPhilipp Hug
2019-02-09riscv: Use correct argument in a1 when invoking payloadPhilipp Hug
2019-02-02riscv: Show hart id in trap handlerPhilipp Hug
2019-02-02riscv: Simplify payload handlingXiang Wang
2019-01-24riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCVRonald G. Minnich
2019-01-17riscv: create Kconfig architecture features for new partsRonald G. Minnich
2019-01-16buildsystem: Promote rules.h to default includeKyösti Mälkki
2018-12-19arch/riscv: Don't set FPU state to "dirty"Jonathan Neuschäfer
2018-12-19arch/riscv: Define and use SBI_ENOSYSJonathan Neuschäfer
2018-12-18arch/riscv: Don't hardcode CSR numbers anymoreJonathan Neuschäfer