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path: root/src/arch/riscv
AgeCommit message (Expand)Author
2018-09-02riscv: separately define stack locations at different stagesXiang Wang
2018-08-30riscv: update the definition of intptr_t/uintptr_tXiang Wang
2018-08-07arch: Retire cache_sync_instructions() from <arch/cache.h> (except arm)Julius Werner
2018-08-01riscv: remove redundancy in MakefileXiang Wang
2018-07-31riscv: fix issues (timestrap & PRIu64)Xiang Wang
2018-07-30riscv: delete src/arch/riscv/prologue.incXiang Wang
2018-07-18arch/riscv: Fix makefile to only set flags for riscvMartin Roth
2018-07-18riscv: add CAR interface Xiang Wang
2018-07-17riscv: add support for modifying compiler optionsXiang Wang
2018-07-12riscv: add include/arch/smp/ directoryXiang Wang
2018-07-11riscv: add support to check ISA extensionXiang Wang
2018-07-06riscv: use __riscv_atomic to check support A extensionXiang Wang
2018-04-27RISC-V boards: Remove PAGETABLES section from memlayout.ldJonathan Neuschäfer
2018-04-26arch/riscv: Store mprv bit in size_tJonathan Neuschäfer
2018-04-11arch/riscv: Remove I/O space access functions (outb, etc.)Jonathan Neuschäfer
2018-02-20arch/riscv: Delegate the page fault exceptionsJonathan Neuschäfer
2018-02-20arch/riscv: Update encoding.h and adjust related codeJonathan Neuschäfer
2018-02-20arch/riscv: Pass the bootrom-provided FDT to the payloadJonathan Neuschäfer
2018-02-20arch/riscv: Don't set up virtual memoryJonathan Neuschäfer
2018-02-20arch/riscv: Make RVC support configurableJonathan Neuschäfer
2018-02-20arch/riscv: Align trap_entry to 4 bytes, as required by specJonathan Neuschäfer
2017-12-02arch/riscv: Remove supervisor_trap_entryJonathan Neuschäfer
2017-12-02riscv: Remove config string supportJonathan Neuschäfer
2017-12-02arch/riscv: Remove the current SBI implementationJonathan Neuschäfer
2017-12-02arch/riscv: Return from trap_handler instead of jumping outJonathan Neuschäfer
2017-12-02arch/riscv: Unify trap returnJonathan Neuschäfer
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-11-07arch/riscv: Use a separate trap stackJonathan Neuschäfer
2017-11-07arch/riscv: gettimer: Don't use the config stringJonathan Neuschäfer
2017-11-07arch/riscv: Drop mret workaroundJonathan Neuschäfer
2017-11-07arch/riscv: mprv_read_*: Mark result as earlyclobberJonathan Neuschäfer
2017-11-07arch/riscv: Fix return type of mprv_read_u64Jonathan Neuschäfer
2017-09-27arch/riscv: hls_init: Initialize time{,cmp} with dummy pointersJonathan Neuschäfer
2017-09-27arch/riscv: Document mprv_{read,write}_* functionsJonathan Neuschäfer
2017-09-27arch/riscv: trap handler: Print load/store access width in bitsJonathan Neuschäfer
2017-09-26riscv: Update register addresswxjstz
2017-07-25src/arch: Fix checkpatch warning: no spaces at the start of a lineMartin Roth
2017-07-07arch/*: Update Kconfig symbol usageMartin Roth
2017-06-07src: change coreboot to lowercaseMartin Roth
2017-05-30arch: Unify basic cache clearing APIJulius Werner
2017-02-20riscv: Suppress invalid coverity errorsMartin Roth
2017-01-16riscv: Move mcall numbers to mcall.h, adjust their namesJonathan Neuschäfer
2017-01-16riscv: get SBI calls to workRonald G. Minnich
2016-12-20riscv: enable counters via m[us]counterenRonald G. Minnich
2016-12-18riscv: Add support for timer interruptsRonald G. Minnich
2016-12-06riscv: Stub out sbi_(un)mask_interruptJonathan Neuschäfer
2016-12-06arch/riscv/mcall.c: Return the correct memory base and sizeJonathan Neuschäfer
2016-11-20riscv: map first 4GiB of physical address spaceRonald G. Minnich
2016-11-14riscv: add a variable to control trap managementRonald G. Minnich
2016-11-13riscv: change payload() to pass the config string pointer as arg0Ronald G. Minnich