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coreboot
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autoport-hsw
broadwell_refcode
e6230
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Some coreboot project code with my work
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c_start.S
Age
Commit message (
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Author
2020-08-21
lib: Add ASan support to ramstage on x86 arch
Harshit Sharma
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-03-06
src/arch/x86: Convert to SPDX license header
Patrick Georgi
2019-12-19
Drop ROMCC code and header guards
Arthur Heymans
2019-11-03
arch/x86: Use the stage argument to implement cbmem_top
Arthur Heymans
2019-10-29
arch/x86/*.S: use defines instead of hardcoded values
Patrick Rudolph
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-01-14
arch/x86: Enforce CPU stack alignment
Kyösti Mälkki
2018-12-28
arch/x86/c_start.S: Use tabs instead of white spaces
Elyes HAOUAS
2018-04-26
arch/x86: allow idt to be available to link in all stages
Aaron Durbin
2018-04-24
arch/x86: prepare for having an idt in other stages
Aaron Durbin
2017-07-07
arch/*: Update Kconfig symbol usage
Martin Roth
2017-03-19
ramstage: Align stack to 16 bytes
Kyösti Mälkki
2017-03-17
arch/x86: Wrap lines at 80 columns
Lee Leahy
2016-07-31
src/arch: Capitalize CPU, RAM and ROM
Elyes HAOUAS
2016-01-26
arch/x86: move SetCodeSelector to .text segment
Patrick Georgi
2016-01-23
arch/x86: remove .intel_syntax
Patrick Georgi
2016-01-19
arch/x86: Indent using tabs not spaces
Martin Roth
2016-01-14
arch/x86: add missing license headers
Martin Roth
2015-09-09
rmodule: use program.ld for linking
Aaron Durbin
2015-07-13
x86: flatten hierarchy
Stefan Reinauer