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coreboot
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autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
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Some coreboot project code with my work
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car.ld
Age
Commit message (
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Author
2018-05-18
arch/x86: Increase TIMESTAMP region size to 0x200
Furquan Shaikh
2018-04-25
arch/x86: add support for cache-as-ram paging
Aaron Durbin
2017-05-12
commonlib: Move drivers/storage into commonlib/storage
Lee Leahy
2017-05-01
arch/x86: Share storage data structures between early stages
Lee Leahy
2017-03-28
vboot: Move remaining features out of vendorcode/google/chromeos
Julius Werner
2016-12-16
x86: Configure premem cbmem console size
Naresh G Solanki
2016-03-05
arch/x86: document CAR symbols and expose them in symbols.h
Andrey Petrov
2016-02-12
timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION Kconfig
Julius Werner
2016-02-11
arch/x86: Reserve space for stack in CAR layout
Andrey Petrov
2016-01-28
Move object files to $(obj)/<class>/
Nico Huber
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-14
x86: add standalone verstage support
Aaron Durbin
2015-09-30
x86: prepare cache-as-ram to allow multiple stages
Aaron Durbin
2015-09-09
x86: link romstage and ramstage with 1 file
Aaron Durbin