index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
x86
/
exit_car.S
Age
Commit message (
Expand
)
Author
2020-08-31
arch/x86/exit_car.S: Fix checking clflush support
Arthur Heymans
2020-08-17
arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dram
Arthur Heymans
2020-08-14
arch/x86/postcar: Add x86_64 support
Patrick Rudolph
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-03-06
src/arch/x86: Convert to SPDX license header
Patrick Georgi
2019-11-03
arch/x86: Use the stage argument to implement cbmem_top
Arthur Heymans
2019-09-10
AUTHORS: Move src/arch/x86 copyrights into AUTHORS file
Martin Roth
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2018-05-03
arch/x86: Relocate GDT in verstage, romstage, and postcar
Hannah Williams
2017-06-29
arch/x86: update assembly to ensure 16-byte alignment into C
Aaron Durbin
2016-12-21
soc/intel/apollolake: allow ApolloLake SoC to use FSP CAR Init
Brenton Dong
2016-09-19
arch/x86: move postcar main logic into C
Aaron Durbin
2016-08-01
arch/x86: Enable postcar console
Lee Leahy
2016-08-01
arch/x86: Display MTRRs after MTRR update in postcar
Lee Leahy
2016-07-27
arch/x86: Add bootblock and postcar support for SOC MTRR access
Lee Leahy
2016-03-23
arch/x86: introduce postcar stage/phase
Aaron Durbin