coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-11-05	riscv: add support for supervisor binary interface (SBI)	Xiang Wang
2018-11-05	riscv: add support to block smp in each stage	Xiang Wang
2018-11-05	riscv: add support smp_pause / smp_resume	Xiang Wang
2018-11-01	arch/x86: clarify raw CAR_GLOBAL access guards	Aaron Durbin
2018-11-01	arch/x86: allow global .bss objects without CAR_GLOBAL	Aaron Durbin
2018-11-01	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-30	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-30	riscv: simplify timer interrupt handling	Philipp Hug
2018-10-30	src/arch/riscv/misaligned.c: Fix an off-by-one error when loading the opcode	Philipp Hug
2018-10-26	arch/x86/acpi: Add TPM2 table support	Philipp Deppenwiese
2018-10-25	selfboot: create selfboot_check function, remove check param	Ronald G. Minnich
2018-10-23	src: Remove unneeded whitespace	Elyes HAOUAS
2018-10-23	acpi_device: Refine ACPI_IRQ_* macros	Furquan Shaikh
2018-10-22	arch/x86: Implement common CF9 reset	Nico Huber
2018-10-17	arch/x86/exception: Improve the readability of a comment	Jonathan Neuschäfer
2018-10-12	libpayload: arm64: Conform to new coreboot lib_helpers.h and assume EL2	Julius Werner
2018-10-11	selfboot: remove bounce buffers	Ronald G. Minnich
2018-10-11	riscv: add physical memory protection (PMP) support	Xiang Wang
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-10-06	arch/riscv: Update comment about mstatus initialization	Jonathan Neuschäfer
2018-10-04	arch/x86: Make mb/romstage.c optional	Rizwan Qureshi
2018-10-04	arch/riscv: Adjust compiler flags for scan-build	Jonathan Neuschäfer
2018-09-26	arch/riscv: Advance the PC after handling misaligned load/store	Jonathan Neuschäfer
2018-09-21	arch/{mips,power8}/include/arch: Don't use device_t	Elyes HAOUAS
2018-09-21	arch/riscv/include/arch: Don't use device_t	Elyes HAOUAS
2018-09-19	arch/arm/include/armv7/arch: Remove dead code	Elyes HAOUAS
2018-09-16	acpi: Call acpi_gen_writeSTA by status from device tree	Hung-Te Lin
2018-09-16	riscv: don't write to mstatus.XS	Xiang Wang
2018-09-15	arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706	Richard Spiegel
2018-09-15	arch/riscv: Configure delegation only if S-mode is supported	Jonathan Neuschäfer
2018-09-14	arch/x86/acpigen: Fix comment in _ROM method generator	Jonathan Neuschäfer
2018-09-14	arch/riscv: Only execute on hart 0 for now	Philipp Hug
2018-09-14	arch/riscv: provide a monotonic timer	Philipp Hug
2018-09-14	arch/riscv: add missing endian.h header to io.h	Philipp Hug
2018-09-14	complier.h: add __always_inline and use it in code base	Aaron Durbin
2018-09-10	riscv: update misaligned memory access exception handling	Xiang Wang
2018-09-10	riscv: update mtime initialization	Xiang Wang
2018-09-07	x86/acpi: Add BERT table	Marshall Dawson
2018-09-07	x86/acpi: Add BERT to the revision table	Marshall Dawson
2018-09-07	arch/x86: Add BERT region support functions	Marshall Dawson
2018-09-06	chromeos/gnvs: remove function and naming cleanup	Joel Kitching
2018-09-06	x86/acpi: Add APEI definitions	Marshall Dawson
2018-09-05	arch/x86/Makefile: include dependencies for romcc bootblock	Nico Huber
2018-09-05	riscv: add entry assembly file for RAMSTAGE	Xiang Wang
2018-09-05	riscv: add support to check machine length at runtime	Xiang Wang
2018-09-04	riscv: add spin lock support	Xiang Wang
2018-09-04	riscv: Add DEFINE_MPRV_READ_MXR to read execution-only page	Xiang Wang
2018-09-02	riscv: separately define stack locations at different stages	Xiang Wang
2018-08-30	riscv: update the definition of intptr_t/uintptr_t	Xiang Wang
2018-08-28	acpi: Hide Chrome and coreboot specific devices	David Wu