summaryrefslogtreecommitdiff
path: root/src/arch
AgeCommit message (Expand)Author
2015-11-07arm64: Remove cpu intialization through device-treeFurquan Shaikh
2015-11-07arm64: Remove SMP supportFurquan Shaikh
2015-11-07arm64: remove spin table supportAaron Durbin
2015-11-07arm64: remove ARCH_ARM64_CORTEX_A57_POWER_DOWN_SUPPORTAaron Durbin
2015-11-07arm64: remove secmonAaron Durbin
2015-11-06AMD Bettong: Enable S4 feature for Windows 7zbao
2015-11-04ACPI: Add functions for DMAR I/O-APIC and HPET entriesNico Huber
2015-11-04ACPI: Make DMAR flags settableNico Huber
2015-11-03arch/x86/bootblock_normal: Fix failure to buildTimothy Pearson
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-31arch/x86: avoid race condition on build.hPatrick Georgi
2015-10-30wakeup: Switch back to 32bit mode firstStefan Reinauer
2015-10-17armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/writePaul Kocialkowski
2015-10-16arch/x86/smbios: Add Crucial DIMM manufacturer IDTimothy Pearson
2015-10-16arch/x86/boot/smbios: Add SPD IDs for Kingston and CorsairTimothy Pearson
2015-10-14x86: add standalone verstage supportAaron Durbin
2015-10-11vboot: remove remnants of VBOOT_STUBAaron Durbin
2015-10-08arch/x86/bootblock: Do not include non-code files in bootblock.SAlexandru Gagniuc
2015-10-08arch/x86: Link walkcbfs.S instead on including it in bootblock.SAlexandru Gagniuc
2015-10-08arch/x86/bootblock: Link in object files selected with bootblock-yAlexandru Gagniuc
2015-10-08arch/x86/Makefile.inc: Simplify rule for bootblock.debugAlexandru Gagniuc
2015-10-07x86/bootblock: Use LDFLAGS_bootblock to enable garbage collectionAlexandru Gagniuc
2015-09-30x86: prepare cache-as-ram to allow multiple stagesAaron Durbin
2015-09-30x86: provide common macro for linking early stagesAaron Durbin
2015-09-29Makefile: Replace the way to test if a string is emptyzbao
2015-09-28arm64: mmu: Prevent CPU prefetch instructions from device memoryJimmy Huang
2015-09-23RISCV: modify arch_prog_run to handle payloads correctly.Ronald G. Minnich
2015-09-22coreboot: introduce commonlibAaron Durbin
2015-09-16riscv-virtual-memory: move page tables into virtual address spaceThaminda Edirisooriya
2015-09-16riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya
2015-09-16x86: remove double link step for romstageAaron Durbin
2015-09-15riscv-trap-handling: Add functionality, prevent stack corruptionThaminda Edirisooriya
2015-09-10riscv-trap-handling: Add implementation for trap calls in riscvThaminda Edirisooriya
2015-09-10riscv-virtual-memory: Add virtual memory setupThaminda Edirisooriya
2015-09-09x86: link ramstage the same way regardless of RELOCATABLE_RAMSTAGEAaron Durbin
2015-09-09linking: add and use LDFLAGS_commonAaron Durbin
2015-09-09x86: link romstage and ramstage with 1 fileAaron Durbin
2015-09-09rmodule: use program.ld for linkingAaron Durbin
2015-09-09x86: link romstage like the other architecturesAaron Durbin
2015-09-09x86: link ramstage like the other architecturesAaron Durbin
2015-09-09linking: lay the groundwork for a unified linking approachAaron Durbin
2015-09-09x86: provide minimum alignment for romstageAaron Durbin
2015-09-09x86: remove unused sections from romstage.ldAaron Durbin
2015-09-09x86: add romstage.S to bind program flow and orderingAaron Durbin
2015-09-09x86: don't create MAINBOARDDIR/romstage.inc for !ROMCC boardsAaron Durbin
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-09-05symbols: add '_' to pci_drivers and cpu_drivers symbolsAaron Durbin
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-08-31timestamp: add tick frequency to exported tableAaron Durbin
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-20 15:56:17 +0000