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path: root/src/arch
AgeCommit message (Expand)Author
2015-10-11vboot: remove remnants of VBOOT_STUBAaron Durbin
2015-10-08arch/x86/bootblock: Do not include non-code files in bootblock.SAlexandru Gagniuc
2015-10-08arch/x86: Link walkcbfs.S instead on including it in bootblock.SAlexandru Gagniuc
2015-10-08arch/x86/bootblock: Link in object files selected with bootblock-yAlexandru Gagniuc
2015-10-08arch/x86/Makefile.inc: Simplify rule for bootblock.debugAlexandru Gagniuc
2015-10-07x86/bootblock: Use LDFLAGS_bootblock to enable garbage collectionAlexandru Gagniuc
2015-09-30x86: prepare cache-as-ram to allow multiple stagesAaron Durbin
2015-09-30x86: provide common macro for linking early stagesAaron Durbin
2015-09-29Makefile: Replace the way to test if a string is emptyzbao
2015-09-28arm64: mmu: Prevent CPU prefetch instructions from device memoryJimmy Huang
2015-09-23RISCV: modify arch_prog_run to handle payloads correctly.Ronald G. Minnich
2015-09-22coreboot: introduce commonlibAaron Durbin
2015-09-16riscv-virtual-memory: move page tables into virtual address spaceThaminda Edirisooriya
2015-09-16riscv-memlayout: fix existing memlayout issues, add sbi interfaceThaminda Edirisooriya
2015-09-16x86: remove double link step for romstageAaron Durbin
2015-09-15riscv-trap-handling: Add functionality, prevent stack corruptionThaminda Edirisooriya
2015-09-10riscv-trap-handling: Add implementation for trap calls in riscvThaminda Edirisooriya
2015-09-10riscv-virtual-memory: Add virtual memory setupThaminda Edirisooriya
2015-09-09x86: link ramstage the same way regardless of RELOCATABLE_RAMSTAGEAaron Durbin
2015-09-09linking: add and use LDFLAGS_commonAaron Durbin
2015-09-09x86: link romstage and ramstage with 1 fileAaron Durbin
2015-09-09rmodule: use program.ld for linkingAaron Durbin
2015-09-09x86: link romstage like the other architecturesAaron Durbin
2015-09-09x86: link ramstage like the other architecturesAaron Durbin
2015-09-09linking: lay the groundwork for a unified linking approachAaron Durbin
2015-09-09x86: provide minimum alignment for romstageAaron Durbin
2015-09-09x86: remove unused sections from romstage.ldAaron Durbin
2015-09-09x86: add romstage.S to bind program flow and orderingAaron Durbin
2015-09-09x86: don't create MAINBOARDDIR/romstage.inc for !ROMCC boardsAaron Durbin
2015-09-09x86: bootblock: remove linking and program flow from build systemAaron Durbin
2015-09-07Drop "See file CREDITS..." commentStefan Reinauer
2015-09-05symbols: add '_' to pci_drivers and cpu_drivers symbolsAaron Durbin
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-08-31timestamp: add tick frequency to exported tableAaron Durbin
2015-08-31armv7/arm64: remove timestamp.cAaron Durbin
2015-08-28arm64: xcompile: Add support for A53 erratum 843419Julius Werner
2015-08-28arm64: Fix 'verstage-objs: command not found' errorYidi Lin
2015-08-28arm64: declare do_dcsw_op as functionJimmy Huang
2015-08-26riscv-trap-handling: Add preliminary trap handling for riscvThaminda Edirisooriya
2015-08-25x86: Get rid of empty loadable segment warningMartin Roth
2015-08-14acpi: 64bit fixesStefan Reinauer
2015-08-13x86: parameterize asl_template for CBFS inclusionAaron Durbin
2015-08-13amd: raminit sysinfo offset fixAaron Durbin
2015-08-09riscv-spike: support for Spike emulation of riscvThaminda Edirisooriya
2015-08-09acpi: Align FACS to 64 bytesPatrick Georgi
2015-08-04x86: Make sure boot device is mapped below 4GStefan Reinauer
2015-07-29arm, arm64, mips: Add rough static stack size checks with -Wstack-usageJulius Werner
2015-07-27arch/x86: make dependency explicitPatrick Georgi
2015-07-22riscv: Link in libgccPatrick Georgi
2015-07-21arm64: Set LOG_LEVEL=0 for BL31 if coreboot does not use serialFurquan Shaikh
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