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AgeCommit message (Expand)Author
2018-09-15arch/riscv: Configure delegation only if S-mode is supportedJonathan Neuschäfer
2018-09-14arch/x86/acpigen: Fix comment in _ROM method generatorJonathan Neuschäfer
2018-09-14arch/riscv: Only execute on hart 0 for nowPhilipp Hug
2018-09-14arch/riscv: provide a monotonic timerPhilipp Hug
2018-09-14arch/riscv: add missing endian.h header to io.hPhilipp Hug
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-09-10riscv: update misaligned memory access exception handlingXiang Wang
2018-09-10riscv: update mtime initializationXiang Wang
2018-09-07x86/acpi: Add BERT tableMarshall Dawson
2018-09-07x86/acpi: Add BERT to the revision tableMarshall Dawson
2018-09-07arch/x86: Add BERT region support functionsMarshall Dawson
2018-09-06chromeos/gnvs: remove function and naming cleanupJoel Kitching
2018-09-06x86/acpi: Add APEI definitionsMarshall Dawson
2018-09-05arch/x86/Makefile: include dependencies for romcc bootblockNico Huber
2018-09-05riscv: add entry assembly file for RAMSTAGEXiang Wang
2018-09-05riscv: add support to check machine length at runtimeXiang Wang
2018-09-04riscv: add spin lock supportXiang Wang
2018-09-04riscv: Add DEFINE_MPRV_READ_MXR to read execution-only pageXiang Wang
2018-09-02riscv: separately define stack locations at different stagesXiang Wang
2018-08-30riscv: update the definition of intptr_t/uintptr_tXiang Wang
2018-08-28acpi: Hide Chrome and coreboot specific devicesDavid Wu
2018-08-27x86/acpi: Update MADT table versionMarc Jones
2018-08-27x86/acpi: Add ACPI table revision functionMarc Jones
2018-08-22acpi: remove CBMEM_ID_ACPI_GNVS_PTR entryJoel Kitching
2018-08-17arm64: Factor out common parts of romstage execution flowJulius Werner
2018-08-17x86/acpigen: Fix ACPI _ROM methodMarc Jones
2018-08-17arch/x86/acpigen: add methods for cppcMatt Delco
2018-08-15arch/x86/acpigen: refactor calls to acpigen_write_registerMatt Delco
2018-08-14cbmem: rename vdat to chromeos_acpiJoel Kitching
2018-08-13arm64: mmu: Spot check security state for TTB mappingJulius Werner
2018-08-10arm64: Turn architectural register accessors into inline functionsJulius Werner
2018-08-10arm64: Drop checks for current exception level, hardcode EL3 assumptionJulius Werner
2018-08-10arm64: Remove set_cntfrq() functionJulius Werner
2018-08-09arch/x86/tables.c: Avoid static analysis error for unused valueRichard Spiegel
2018-08-09src/arch: Fix typoElyes HAOUAS
2018-08-09arch/x86/exception.c: Remove double initializationRichard Spiegel
2018-08-07arch: Retire cache_sync_instructions() from <arch/cache.h> (except arm)Julius Werner
2018-08-07arm64: Disable MMU during legacy payload handoff (without Arm TF)Julius Werner
2018-08-01riscv: remove redundancy in MakefileXiang Wang
2018-07-31riscv: fix issues (timestrap & PRIu64)Xiang Wang
2018-07-30riscv: delete src/arch/riscv/prologue.incXiang Wang
2018-07-30security/tpm: Use unique CBMEM names for TCPA logsPhilipp Deppenwiese
2018-07-26arch/arm64: Add Kconfig to include BL31 as blobPatrick Rudolph
2018-07-19arch/x86/smbios: Add support for table 38Patrick Rudolph
2018-07-18arch/riscv: Fix makefile to only set flags for riscvMartin Roth
2018-07-18riscv: add CAR interface Xiang Wang
2018-07-17riscv: add support for modifying compiler optionsXiang Wang
2018-07-12riscv: add include/arch/smp/ directoryXiang Wang
2018-07-11riscv: add support to check ISA extensionXiang Wang
2018-07-09src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS