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AgeCommit message (Expand)Author
2015-04-27arch/arm64: update mmu translation table granule size, logic and macrosJimmy Huang
2015-04-27arm64: save/restore cptr_el3 and cpacr_el1 registersJoseph Lo
2015-04-27arm64: implement CPU power down sequence as per A57/A53/A72 TRMJoseph Lo
2015-04-27arm64: introduce data cache ops by set/way to the level specifiedJoseph Lo
2015-04-27arm64: perform early setup in secmon tooJoseph Lo
2015-04-27arm64: Allow cpu specific early setupFurquan Shaikh
2015-04-22armv8/secmon: Disable and Enable GIC in PSCI pathFurquan Shaikh
2015-04-22armv8/secmon: Correct PSCI function idsFurquan Shaikh
2015-04-22armv8/secmon: Correct names for SMC macrosFurquan Shaikh
2015-04-22arm64: save and restore cntfrq for secondary cpusJimmy Huang
2015-04-22arm64: add arm64_arch_timer_init functionJoseph Lo
2015-04-22arch/armv7: Add API to disable MMU pages.Deepa Dinamani
2015-04-22arm64: Correct shareability option for normal memoryFurquan Shaikh
2015-04-22google/urara: use board ID information to set up hardwareIonela Voinescu
2015-04-22arch/arm64: allow floating-point registers accessYen Lin
2015-04-22arm64: provide icache_invalidate_all()Aaron Durbin
2015-04-21armv7: preserve bootblock invocation parameterVadim Bendebury
2015-04-21Unify byte order macros and clrsetbitsJulius Werner
2015-04-21arm(64): Change write32() argument order to match x86Julius Werner
2015-04-21arm(64): Replace write32() and friends with writel()Julius Werner
2015-04-21x86: Allow builds without ACPI tablesLee Leahy
2015-04-21arch/mips: simplify cache operationsIonela Voinescu
2015-04-21urara: Identity map DRAM/SRAMAndrew Bresticker
2015-04-21mips: Allow memory to be identity mapped in the TLBAndrew Bresticker
2015-04-18riscv: use new-style CBFS header lookupPatrick Georgi
2015-04-17armv7: set CBFS header to zeroVadim Bendebury
2015-04-17armv7: work around hang in bootblock startup codeDaisuke Nojiri
2015-04-17rk3288: Handle framebuffer through memlayout, not the resource systemJulius Werner
2015-04-17arch/mips: Fix bug when performing cache operationsIonela Voinescu
2015-04-17arm: allow custom stage entry codeDaisuke Nojiri
2015-04-15Kconfig: Fix incorrect CONFIG_STACK_SIZE values for X86 and ARM64Julius Werner
2015-04-14arm: Fix checkstack() to use correct stack sizeJulius Werner
2015-04-14rk3288: Add CBMEM console support and fix RETURN_FROM_VERSTAGEJulius Werner
2015-04-14timer: Reestablish init_timer(), consolidate timer initialization callsJulius Werner
2015-04-14CBFS: Automate ROM image layout and remove hardcoded offsetsJulius Werner
2015-04-14CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstoolJulius Werner
2015-04-13arch/mips: provide proper cache primitivesIonela Voinescu
2015-04-13mips: disable caches in bootblock startup codeVadim Bendebury
2015-04-13arm: Add bootblock_mainboard_early_init() for pre-console initializationJulius Werner
2015-04-13urara: add support for DMA coherent memory areaIonela Voinescu
2015-04-13arch: armv7: Fix cache sync instructions.Deepa Dinamani
2015-04-10arm64: No need of invalidating cache line for secondary CPU stackFurquan Shaikh
2015-04-10arm64: Add support for save/restore registers for CPU startup.Furquan Shaikh
2015-04-10arm64: Add macro to invalidate stage 1 TLB entries at current ELFurquan Shaikh
2015-04-10arm64: Add conditional read/write from/to EL3 assembly macros.Furquan Shaikh
2015-04-10arm64: Add function for reading TCR register at current ELFurquan Shaikh
2015-04-10arm64: psci: actually inform SoC layer of CPU_ON entryAaron Durbin
2015-04-10arm64: ensure secondary CPU's stack tops are not in the cacheAaron Durbin
2015-04-10arm64: add timeout waiting for CPUs to come onlineAaron Durbin
2015-04-10x86: Support reset routines in bootblockLee Leahy
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