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Change-Id: I8a207e30a73d10fe67c0474ff11324ae99e2cec6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41360
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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unused includes of <stdin.h> found using following commande:
diff <(git grep -l '#include <stdint.h>' -- src/) <(git grep -l
'int8_t\|uint8_t\|int16_t\|uint16_t\|int32_t\|uint32_t\|int64_t\|
uint64_t\|intptr_t\|uintptr_t\|intmax_t\|uintmax_t\|s8\|u8\|s16\|
u16\|s32\|u32\|s64\|u64\|INT8_MIN\|INT8_MAX\|UINT8_MAX\|INT16_MIN\
|INT16_MAX\|UINT16_MAX\|INT32_MIN\|INT32_MAX\|UINT32_MAX\|INT64_MIN\
|INT64_MAX\|UINT64_MAX\|INTMAX_MIN\|INTMAX_MAX\|UINTMAX_MAX' -- src/)
|grep '<' |grep -v vendor |grep -vF '.h'
Change-Id: Icb9b54c6abfb18d1e263665981968a4d7cccabeb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41148
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Stefan thinks they don't add value.
Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)
The exceptions are for:
- crossgcc (patch file)
- gcov (imported from gcc)
- elf.h (imported from GNU's libc)
- nvramtool (more complicated header)
The removed lines are:
- fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-# This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */
Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The only caller is contained within the postcar_loader compilation unit.
Therefore, remove postcar_frame_common_mtrrs() from the global symbol
namespace.
Change-Id: I90d308669d13eb2bebf1eca4d47e3f3b4f178714
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41101
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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In order to the Kconfigs in the same directory where the corresponding
code lives, this change moves ACPI_BERT to arch/x86/Kconfig and
following configs to acpi/Kconfig:
ACPI_CPU_STRING
ACPI_HAVE_PCAT_8259
ACPI_NO_PCAT_8259
HAVE_ACPI_TABLES
BUG=b:155428745
Change-Id: I289565f38e46bd106ff89685aaf8f57e53d9827a
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40932
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split
into multiple CLs. This is change 5/5 which moves the addition of ACPI
table related files from arch/x86/Makefile.inc to acpi/Makefile.inc.
BUG=b:155428745
Change-Id: I8143fd37357aeb0561516450adddc6714d539ada
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 4/5 which gets rid of the placeholder
header files that were added to temporarily include acpi/ header files
from arch/header files.
BUG=b:155428745
Change-Id: If6e8580c3c6433f9239e06a1dc7ba661b3f597e5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40939
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 2/5 which moves the contents of
arch/x86/include/arch/acpi*.h files into include/acpi/acpi*.h and
updates the arch header files to include acpi header files. These are
just temporary placeholders and will be removed later in the series.
BUG=b:155428745
Change-Id: I9acb787770b7f09fd2cbd99cb8d0a6499b9c64b3
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40937
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 1/5 which moves .c files from arch/x86 to
acpi/.
The only acpi files that are still retained under arch/x86 are:
a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there
are some assumptions in there about SMM which will have to be resolved
if this file needs to be moved to common code.
b. acpi_bert_storage.c/bert_storage.h: This file is currently written
specifically with x86 in mind. So, not moving the file for now.
Motivation for this change: Not all stages on Picasso SoC are targeted
for the same architecture. For example, verstage (if runs before
bootblock) will be targeted for non-x86. This makes it difficult to
add device tree to verstage which would be required to get to SoC
configs from the tree. This is because the device tree on x86
platforms currently contains a lot of devices that require ACPI
related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so
on). Hence, this change removes all ACPI table support out of
arch/x86.
BUG=b:155428745
Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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This change makes power_res_dev_states[] to be static const * const as
complained by Jenkins.
BUG=b:155428745
Change-Id: Ice2fff6ab3bcd72a059bc905b7462a681f2e6aaf
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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This change adds a helper function cpu_get_lapic_addr() that returns
LOCAL_APIC_ADDR for x86. It also adds a weak default implementation
which returns 0 if platform does not support LAPIC. This is being
done in preparation to move all ACPI table support in coreboot out of
arch/x86.
BUG=b:155428745
Change-Id: I4d9c50ee46804164712aaa22be1b434f800871ec
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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An array of 64bit integers is passed to acpi_dp_add_integer_array() but
it is not const so can't take a const array without a compiler error.
The function does not modify the array so it can be made const without
breaking anything and allowing a const array to be passed in the future.
BUG=b:146482091
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I98ecdaef5ddfa2026390e2812f5ea841ee51f073
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40882
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The generic container HID is defined in ACPI specification as PNP0A05.
BUG=b:146482091
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I3632e77533a47f22b92259b469b03e63f51687e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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Currently if a child table is created and added to a property list
without adding any properties to that child it will generate an
empty package. For example:
struct acpi_dp *dsd = acpi_dp_new_table("_DSD");
struct acpi_dp *prop = acpi_dp_new_table("PROP");
acpi_dp_add_child(dsd, "dsd-prop", prop);
acpi_dp_write(dsd);
Results in an empty PROP package:
Name (_DSD, Package (2)
{
ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b")
Package (1) {
Package (2) {
"dsd-prop",
"PROP"
}
}
}
Name (PROP, Package (0)
{
}
Empty packages don't seem to be explicitly forbidden, but they don't
serve a purpose with device properties. Instead, if packages without
any properties or children are skipped then this empty package is not
written and the added child property can refer to another property that
is already defined.
This allows creating property references to existing tables, which can
save duplication and namespace collision issues with nested properties.
BUG=b:146482091
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I9fee2ceb8a4496b90c7210533eee8c2b186cdfff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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acpigen_write_field() does not need to modify the fieldlist
parameter. Thus, this change makes this parameter as const.
Change-Id: I94688913cee8948f42ae5e184f2d24264876648d
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40784
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This change adds the following acpigen helpers:
a. acpigen_write_store_op_to_namestr: This generates ACPI code for
storing an ACPI OP to name string
b. acpigen_write_if_lequal_namestr_int: This generates ACPI code for
checking if operand1 and operand2 are equal where operand1 is
namestring and operand2 is an integer.
Change-Id: I84c158361c0725c2927f06be35391e61f627a453
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40783
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add support for devices with the reset vector pointing into DRAM. This
is a specific implementation that assumes a paradigm of AMD Family 17h
(a.k.a. "Zen"). Until the first ljmpl for protected mode, the core's
state appears to software like other designs, and then the actual
physical addressing becomes recognizable.
These systems cannot implement cache-as-RAM as in more traditional
x86 products. Therefore instead of reusing CAR names and variables,
a substitute called "earlyram" is introduced. This change makes
adjustments to CAR-aware files accordingly.
Enable NO_XIP_EARLY_STAGES. The first stage is already in DRAM, and
running subsequent stages as XIP in the boot device would reduce
performance.
Finally, add a new early_ram.ld linker file. Because all stages run in
DRAM, they can be linked with their .data and .bss as normal, i.e. they
don't need to rely on storage available only at a fixed location like
CAR systems. The primary purpose of the early_ram.ld is to provide
consistent locations for PRERAM_CBMEM_CONSOLE, TIMESTAMP regions, etc.
across stages until cbmem is brought online.
BUG=b:147042464
TEST=Build for trembyle, and boot to ramstage.
$ objdump -h cbfs/fallback/bootblock.debug
Idx ,Name ,Size ,VMA ,LMA ,File off Algn
0 ,.text ,000074d0 ,08076000 ,08076000 ,00001000 2**12
1 ,.data ,00000038 ,0807d4d0 ,0807d4d0 ,000084d0 2**2
2 ,.bss ,00000048 ,0807d508 ,0807d508 ,00008508 2**2
3 ,.stack ,00000800 ,0807daf0 ,0807daf0 ,00000000 2**0
4 ,.persistent ,00001cfa ,0807e2f0 ,0807e2f0 ,00000000 2**0
5 ,.reset ,00000010 ,0807fff0 ,0807fff0 ,0000aff0 2**0
6 ,.debug_info ,0002659c ,00000000 ,00000000 ,0000b000 2**0
7 ,.debug_abbrev ,000074a2 ,00000000 ,00000000 ,0003159c 2**0
8 ,.debug_aranges,00000dd0 ,00000000 ,00000000 ,00038a40 2**3
9 ,.debug_line ,0000ad65 ,00000000 ,00000000 ,00039810 2**0
10 ,.debug_str ,00009655 ,00000000 ,00000000 ,00044575 2**0
11 ,.debug_loc ,0000b7ce ,00000000 ,00000000 ,0004dbca 2**0
12 ,.debug_ranges ,000029c0 ,00000000 ,00000000 ,00059398 2**3
Change-Id: I9c084ff6fdcf7e9154436f038705e8679daea780
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35035
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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.acpi_fill_ssdt() does not need to modify the device structure. This
change makes the struct device * parameter to acpi_fill_ssdt() as
const.
Change-Id: I110f4c67c3b6671c9ac0a82e02609902a8ee5d5c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40710
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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acpi_device_uid() and acpi_device_write_uid() do not need to make
changes to the device structure. Thus, this change marks struct
device * parameter to these functions as const.
Change-Id: I3755223766c78f93c57ac80caf392985cfd5c5e5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40702
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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.write_acpi_tables() should not be updating the device structure. This
change makes the struct device * argument to it as const.
Change-Id: I50d013e83a404e0a0e3837ca16fa75c7eaa0e14a
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40701
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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This change adds a helper function to write a PCI device with _ADR
and _STA defined for it.
BUG=b:153858769
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I932af917d91198876fe8e90af9bb7a2531bd8960
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40674
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This change adds the following helpers:
acpigen_write_ADR: Generates _ADR object using provided 64-bit address
acpigen_write_ADR_pci_devfn: Generates _ADR object for PCI bus device
using devfn as input.
acpigen_write_ADR_pci_device: Generates _ADR object for PCI
bus device using struct device * as input.
BUG=b:153858769
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I139dfc30aa7db303c1e8bd4a8f9ee0933a60139b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40670
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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When CONFIG_SEPARATE_VERSTAGE=n, all verstage code gets linked into the
appropriate calling stage (bootblock or romstage). This means that
ENV_VERSTAGE is actually 0, and instead ENV_BOOTBLOCK or ENV_ROMSTAGE
are 1. This keeps tripping up people who are just trying to write a
simple "are we in verstage (i.e. wherever the vboot init logic runs)"
check, e.g. for TPM init functions which may run in "verstage" or
ramstage depending on whether vboot is enabled. Those checks will not
work as intended for CONFIG_SEPARATE_VERSTAGE=n.
This patch renames ENV_VERSTAGE to ENV_SEPARATE_VERSTAGE to try to
clarify that this macro can really only be used to check whether code is
running in a *separate* verstage, and clue people in that they may need
to cover the linked-in verstage case as well.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I2ff3a3c3513b3db44b3cff3d93398330cd3632ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Add keymaps for keys that are not present in US keyboards.
Change-Id: I1ad4c483e81438456533b4c071a4a56cbee88f9c
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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Add new file to generate ACPI _DSD code for PS2 keyboards. The
following 2 device properties are generated as needed:
function-row-phymap: A list of ordered scancodes for function row.
linux,keymap: Symantically, this is an array of "scancode,keycode"
tuple entries. Each entry teaches linux the keycode corresponding
to a scancode.
Signed-off-by: Rajat Jain <rajatja@google.com>
Change-Id: I5ee05173106a125793e91c263610731543c85472
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
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Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38199
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Explicitly assign numerical values to the enumerated sleep state
values.
BUG=b:153854742
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: I1de2e7f65a2dc3f8a9a1c5fd83d164871a4a2b96
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Add structs and methods for revision 3.
Change-Id: Ida75f530551ad2b8b20ce7fdeffb3befc51296bc
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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Some of the revision 4 FADT fields were already updated to ACPI
spec revision 6, but not all of them. In addition the advertised
FADT revision was 3.
Implement all fields as defined in version 6 and bump the advertised
FADT revision to 6.
Also set all used access_size fields and x_gpe0_blk to sane values
as Windows 10 verifies those fields starting with FADT revision 5.
Fixes: https://ticket.coreboot.org/issues/109
Tested on Windows 10.
Change-Id: Ic649040025cd09ed3e490a521439ca4e681afbbf
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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Add definitions of I/O Virtualization Hardware Definition Block
type 11h structures for ACPI I/O Virtualization Reporting Structure
generation.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I698ac6f6a2e0bc5736fbb14ef583bbe031baee28
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40041
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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These two identifiers were always very confusing. We're not filling and
injecting generators. We are filling SSDTs and injecting into the DSDT.
So drop the `_generator` suffix. Hopefully, this also makes ACPI look a
little less scary.
Change-Id: I6f0e79632c9c855f38fe24c0186388a25990c44d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39977
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: David Guckian
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The maximum ACPI table size is currently hardcoded to 144 KiB.
When using QEMU with TPM enabled there is ~200 KiB of ACPI tables
returned by the fw_cfg interface, so in order to allow this to be
overridden by a mainboard move it to Kconfig.
This is seen when using a TPM with qemu as it will hang when
processing the fw_cfg tables.
qemu-system-x86_64 \
-machine q35 -enable-kvm -vga virtio -serial stdio \
-drive 'id=hd,file=disk.bin' -bios coreboot.rom \
-chardev 'socket,id=swtpm,path=/tmp/swtpm/swtpm-sock' \
-tpmdev 'emulator,id=tpm0,chardev=swtpm' \
-device 'tpm-tis,tpmdev=tpm0'
Change-Id: Ib5baa8fe12cb9027a340875f1ccf5fef6f9460bd
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39832
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Currently, those who want to use measured boot implemented within
vboot should enable verified boot first, along with sections such
as GBB and RW slots defined with manually written fmd files, even
if they do not actually want to verify anything.
As discussed in CB:34977, measured boot should be decoupled from
verified boot and make them two fully independent options. Crypto
routines necessary for measurement could be reused, and TPM and CRTM
init should be done somewhere other than vboot_logic_executed() if
verified boot is not enabled.
In this revision, only TCPA log is initialized during bootblock.
Before TPM gets set up, digests are not measured into tpm immediately,
but cached in TCPA log, and measured into determined PCRs right after
TPM is up.
This change allows those who do not want to use the verified boot
scheme implemented by vboot as well as its requirement of a more
complex partition scheme designed for chromeos to make use of the
measured boot functionality implemented within vboot library to
measure the boot process.
TODO: Measure MRC Cache somewhere, as MRC Cache has never resided in
CBFS any more, so it cannot be covered by tspi_measure_cbfs_hook().
Change-Id: I1fb376b4a8b98baffaee4d574937797bba1f8aee
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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Picasso and Dali need different video bioses even though they use the
same code in most other places.
The Kconfig symbol names are changed from the downstream commit to make
them more consistent with current coreboot code.
BUG=b:145817712
TEST=Build Dali vBIOS into the coreboot image
Change-Id: Ide0d061fda0abc78a74ddf97ba81fc3cf2b02e4f
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1956534
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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The ACPI Spec 2.0 states, that Processor declarations should be made
within the ACPI namespace \_SB and not \_PR anymore. \_PR is deprecated
and is removed here for Intel CPUs only.
Tested on:
* X11SSH (Kabylake)
* CFL Platform
* Asus P8Z77-V LX2 and Windows 10
FWTS does not return FAIL anymore on ACPI tests
Tested-by: Angel Pons <th3fanbus@gmail.com>
Change-Id: Ib101ed718f90f9056d2ecbc31b13b749ed1fc438
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37814
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Change-Id: I487fb53bb2b011d214f002fc200ade2f128a4cc6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Change-Id: I6374bc2d397800d574c7a0cc44079c09394a0673
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37984
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I83fb453344c31f2cfa97bdaf1b8791a7bef97fd7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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This also drops individual copyright notices, all mentioned authors in
that part of the tree are listed in AUTHORS.
Change-Id: Ib5a92bb46ff2b9d2928aae3763daec71747044c2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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This also drops individual copyright notices, all mentioned authors in
that part of the tree are listed in AUTHORS.
Change-Id: I770c1afd9b68a40ec0e69818f24b5ef3ad4f1d35
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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This also drops individual copyright notices, all mentioned authors in
that part of the tree are already listed in AUTHORS.
Change-Id: I19b1c379b474dd011e2d0f8c8202ff1351c9290d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This also drops individual copyright notices, all mentioned authors in
that part of the tree are already listed in AUTHORS.
Change-Id: Ic5eddc961d015328e5a90994b7963e7af83cddd3
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This also drops individual copyright notices, all mentioned authors in
that part of the tree are already listed in AUTHORS.
Change-Id: Ic2bab77edaf7ad97b7f3278cb108226a18cf3791
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39278
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
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This reverts commit c8b0f31ca1b6cae993736d47d919080b6c186c6f.
Bumping the FADT table version from 3 to 6 causes
Windows 10 to BSOD with an ACPI BIOS error or simply
fail to boot on multiple platforms (Haswell, Broadwell,
Braswell, Skylake). Revert until the issue can be properly
identified and corrected.
Change-Id: I261d953321df2616a3f1c3460a535b57a8848315
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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The dot is not needed, as it is no sentence and followed by a line
break.
Change-Id: I3905853eb7039f9c6d2486a77da47a4460276624
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30806
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Some of the revision 4 FADT fields were already updated to ACPI
spec revision 6, but not all of them. In addition the advertised
FADT revision was 3.
Implement all fields as defined in version 6 and bump the advertised
FADT revision to 6.
Change-Id: I10c1e2517df41159ab9b04f763d3805ecba50ffa
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Add new helper function in the acpigen library, that use the underlying
soc routines.
Change-Id: I8d65699d3c806007a50adcb51c5d84567ce451b7
Signed-off-by: Rajat Jain <rajatja@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39145
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
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Change-Id: I17d13c53baf16f58e6e2ba45f439c36f7ba28690
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39071
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Interpretation if # starts a comment inside a variable definition varies
between GNU make versions. Use a wildcard to match the first # and use
`sed` instead of `grep | cut` to avoid unbalanced quoting chars.
Tested with GNU make 4.2.1 and 4.3. Both produce the same output as
4.2.1 did before the patch.
Change-Id: Ib7c4d7323e112968d3f14ea0590b7dabc57c9c45
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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