coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-10-04	arch/x86: Make mb/romstage.c optional	Rizwan Qureshi
2018-10-04	arch/riscv: Adjust compiler flags for scan-build	Jonathan Neuschäfer
2018-09-26	arch/riscv: Advance the PC after handling misaligned load/store	Jonathan Neuschäfer
2018-09-21	arch/{mips,power8}/include/arch: Don't use device_t	Elyes HAOUAS
2018-09-21	arch/riscv/include/arch: Don't use device_t	Elyes HAOUAS
2018-09-19	arch/arm/include/armv7/arch: Remove dead code	Elyes HAOUAS
2018-09-16	acpi: Call acpi_gen_writeSTA by status from device tree	Hung-Te Lin
2018-09-16	riscv: don't write to mstatus.XS	Xiang Wang
2018-09-15	arch/x86/acpi_bert_storage.c: Fix coverity error CID 1395706	Richard Spiegel
2018-09-15	arch/riscv: Configure delegation only if S-mode is supported	Jonathan Neuschäfer
2018-09-14	arch/x86/acpigen: Fix comment in _ROM method generator	Jonathan Neuschäfer
2018-09-14	arch/riscv: Only execute on hart 0 for now	Philipp Hug
2018-09-14	arch/riscv: provide a monotonic timer	Philipp Hug
2018-09-14	arch/riscv: add missing endian.h header to io.h	Philipp Hug
2018-09-14	complier.h: add __always_inline and use it in code base	Aaron Durbin
2018-09-10	riscv: update misaligned memory access exception handling	Xiang Wang
2018-09-10	riscv: update mtime initialization	Xiang Wang
2018-09-07	x86/acpi: Add BERT table	Marshall Dawson
2018-09-07	x86/acpi: Add BERT to the revision table	Marshall Dawson
2018-09-07	arch/x86: Add BERT region support functions	Marshall Dawson
2018-09-06	chromeos/gnvs: remove function and naming cleanup	Joel Kitching
2018-09-06	x86/acpi: Add APEI definitions	Marshall Dawson
2018-09-05	arch/x86/Makefile: include dependencies for romcc bootblock	Nico Huber
2018-09-05	riscv: add entry assembly file for RAMSTAGE	Xiang Wang
2018-09-05	riscv: add support to check machine length at runtime	Xiang Wang
2018-09-04	riscv: add spin lock support	Xiang Wang
2018-09-04	riscv: Add DEFINE_MPRV_READ_MXR to read execution-only page	Xiang Wang
2018-09-02	riscv: separately define stack locations at different stages	Xiang Wang
2018-08-30	riscv: update the definition of intptr_t/uintptr_t	Xiang Wang
2018-08-28	acpi: Hide Chrome and coreboot specific devices	David Wu
2018-08-27	x86/acpi: Update MADT table version	Marc Jones
2018-08-27	x86/acpi: Add ACPI table revision function	Marc Jones
2018-08-22	acpi: remove CBMEM_ID_ACPI_GNVS_PTR entry	Joel Kitching
2018-08-17	arm64: Factor out common parts of romstage execution flow	Julius Werner
2018-08-17	x86/acpigen: Fix ACPI _ROM method	Marc Jones
2018-08-17	arch/x86/acpigen: add methods for cppc	Matt Delco
2018-08-15	arch/x86/acpigen: refactor calls to acpigen_write_register	Matt Delco
2018-08-14	cbmem: rename vdat to chromeos_acpi	Joel Kitching
2018-08-13	arm64: mmu: Spot check security state for TTB mapping	Julius Werner
2018-08-10	arm64: Turn architectural register accessors into inline functions	Julius Werner
2018-08-10	arm64: Drop checks for current exception level, hardcode EL3 assumption	Julius Werner
2018-08-10	arm64: Remove set_cntfrq() function	Julius Werner
2018-08-09	arch/x86/tables.c: Avoid static analysis error for unused value	Richard Spiegel
2018-08-09	src/arch: Fix typo	Elyes HAOUAS
2018-08-09	arch/x86/exception.c: Remove double initialization	Richard Spiegel
2018-08-07	arch: Retire cache_sync_instructions() from <arch/cache.h> (except arm)	Julius Werner
2018-08-07	arm64: Disable MMU during legacy payload handoff (without Arm TF)	Julius Werner
2018-08-01	riscv: remove redundancy in Makefile	Xiang Wang
2018-07-31	riscv: fix issues (timestrap & PRIu64)	Xiang Wang
2018-07-30	riscv: delete src/arch/riscv/prologue.inc	Xiang Wang