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coreboot
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Some coreboot project code with my work
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agesa
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model_14_init.c
Age
Commit message (
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Author
2017-03-15
AGESA f14: Fix infinite loop
Kyösti Mälkki
2017-03-10
cpu/amd/agesa: Unify init files
Paul Menzel
2016-08-23
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-07-31
src/cpu: Capitalize CPU
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-11-21
cpu/amd/agesa/family1*: Use IS_ENABLED() macro
Edward O'Callaghan
2014-06-21
cpu/amd/agesa: Use acpi_is_wakeup()
Kyösti Mälkki
2014-02-12
PCI: Drop includes under cpu
Kyösti Mälkki
2013-04-04
AMD: Drop six copies of wrmsr_amd and rdmsr_amd
Kyösti Mälkki
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-18
AMD S3: Include the s3_resume.h only when S3 is enabled.
Zheng Bao
2012-05-08
Clean up #ifs
Patrick Georgi
2012-04-16
S3 code in coreboot public folder.
zbao
2012-04-02
S3 code whitespaces changes.
zbao
2011-09-07
AMD F14 Rev C0 update
Kerry She
2011-06-22
Rename {CPU|NB|SB}/amd/*_wrapper folders
efdesign98