index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
cpu
/
amd
/
agesa
/
s3_resume.h
Age
Commit message (
Expand
)
Author
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-27
AGESA: Separate HeapManager declarations from BiosCallOuts
Kyösti Mälkki
2015-05-27
AGESA: Split S3 backup in CBMEM
Kyösti Mälkki
2015-05-26
AGESA: Refactor OEM S3 storage
Kyösti Mälkki
2015-05-26
AGESA: Move S3 related SPI writes again
Kyösti Mälkki
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-07-03
AGESA: Clean separation of SPI flash
Kyösti Mälkki
2014-07-03
AGESA boards: Add prepare_for_resume()
Kyösti Mälkki
2014-07-03
AGESA S3: Refactor S3 backup store locations in SPI
Kyösti Mälkki
2014-06-21
cpu/amd/agesa: Use acpi_is_wakeup()
Kyösti Mälkki
2014-04-03
amd/agesa/s3_resume: Make compiler agnostic.
Edward O'Callaghan
2013-06-13
AMD S3 resume: use a function to replace duplicated code
Siyuan Wang
2013-02-26
AGESA: skip s3_resume.h if CONFIG_HAVE_ACPI_RESUME is disabled
Jens Rottmann
2013-02-21
AMD S3: Introduce Kconfig variable 'S3_DATA_SIZE'
Zheng Bao
2013-02-19
AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS
Zheng Bao
2013-02-11
AMD S3: Change the hardcoded data size to macros.
Zheng Bao
2012-08-05
AMD S3: Remove the hardcoded volatile position
zbao
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-04-16
S3 code in coreboot public folder.
zbao