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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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amd
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agesa
Age
Commit message (
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Author
2013-08-15
AMD Kabini: Split DSDT into common sections
Mike Loptien
2013-08-05
AMD Kabini: Add CPU AGESA wrapper for new AMD processor family
Siyuan Wang
2013-07-16
AMD Fam15tn: Split DSDT into common sections
Steve Goodrich
2013-07-10
AMD: Kconfig cleanup
Kyösti Mälkki
2013-06-29
AMD S3 resume: Add framwork to write bigger data
Siyuan Wang
2013-06-13
AMD S3 resume: use a function to replace duplicated code
Siyuan Wang
2013-05-24
cpu/amd/agesa/Kconfig: Select LAPIC_MONOTONIC_TIMER
Paul Menzel
2013-05-08
src/cpu/amd/agesa/Kconfig: Use tabs instead of spaces for alignment
Paul Menzel
2013-05-03
cpu/amd/agesa/family15tn/Kconfig: Remove unneeded `UDELAY_LAPIC`
Paul Menzel
2013-05-03
mainboard/{asus/f2a85-m,amd/thatcher}: move UDELAY_LAPIC
David Hubbard
2013-04-11
Persimmon/Fam14/SB800 DSDT: Split into common areas
Mike Loptien
2013-04-04
AMD: Drop six copies of wrmsr_amd and rdmsr_amd
Kyösti Mälkki
2013-03-22
x86: unify amd and non-amd MTRR routines
Aaron Durbin
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-28
Drop CONFIG_WRITE_HIGH_TABLES
Stefan Reinauer
2013-02-26
AGESA: skip s3_resume.h if CONFIG_HAVE_ACPI_RESUME is disabled
Jens Rottmann
2013-02-26
Revert "AMD S3: Program the flash in a bigger data packet"
Dave Frodin
2013-02-21
AMD S3: Introduce Kconfig variable 'S3_DATA_SIZE'
Zheng Bao
2013-02-19
AMD S3: Change S3_VOLATILE_POS to S3_DATA_POS
Zheng Bao
2013-02-18
AMD S3: Program the flash in a bigger data packet
Zheng Bao
2013-02-18
AMD S3: Include the s3_resume.h only when S3 is enabled.
Zheng Bao
2013-02-11
spi.h: Rename the spi.h to spi-generic.h
Zheng Bao
2013-02-11
AMD S3: Add missing erasing flash sector for saving MTRR register
Zheng Bao
2013-02-11
AMD S3: Change the hardcoded data size to macros.
Zheng Bao
2013-01-25
AGESA: Kconfig: Drop useless depends statement
Patrick Georgi
2013-01-11
AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITS
Zheng Bao
2012-12-12
Claim the SPI bus before writes if the IMC ROM is present
Martin Roth
2012-11-30
AMD S3: Leverage the public SPI routine
Zheng Bao
2012-11-27
Remove AMD special case for LAPIC based udelay()
Patrick Georgi
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-11-20
Unify use of bool config variables
Stefan Reinauer
2012-11-20
Make sure only one udelay function is available
Stefan Reinauer
2012-11-02
AMD agesa: add enable cache at the end of disable_cache_as_ram
Siyuan Wang
2012-10-07
Remove chip.h files without config structure
Kyösti Mälkki
2012-08-22
Auto-declare chip_operations
Kyösti Mälkki
2012-08-09
Synchronize rdtsc instructions
Stefan Reinauer
2012-08-05
AMD S3: Remove the hardcoded volatile position
zbao
2012-08-04
Make the device tree available in the rom stage
Stefan Reinauer
2012-07-14
Remove useless file from building.
zbao
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-05-08
Clean up #ifs
Patrick Georgi
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-04-22
amd: Fix unused variable warning
Vikram Narayanan
2012-04-16
S3 code in coreboot public folder.
zbao
2012-04-12
S3 code in vendorcode folder.
zbao
2012-04-02
S3 code whitespaces changes.
zbao
2012-03-16
Rename AMD_AGESA to CPU_AMD_AGESA
Kyösti Mälkki
2012-03-16
Fix AMD Agesa leaking Kconfig
Kyösti Mälkki
2012-02-17
Remove whitespace.
Patrick Georgi
2012-02-16
AGESA F15: AGESA family15 model 00-0fh cpu wrapper
Kerry Sheh
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