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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
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amd
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agesa
Age
Commit message (
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Author
2013-02-18
AMD S3: Program the flash in a bigger data packet
Zheng Bao
2013-02-18
AMD S3: Include the s3_resume.h only when S3 is enabled.
Zheng Bao
2013-02-11
spi.h: Rename the spi.h to spi-generic.h
Zheng Bao
2013-02-11
AMD S3: Add missing erasing flash sector for saving MTRR register
Zheng Bao
2013-02-11
AMD S3: Change the hardcoded data size to macros.
Zheng Bao
2013-01-25
AGESA: Kconfig: Drop useless depends statement
Patrick Georgi
2013-01-11
AMD: Set the mask of MTRR according to CONFIG_CPU_ADDR_BITS
Zheng Bao
2012-12-12
Claim the SPI bus before writes if the IMC ROM is present
Martin Roth
2012-11-30
AMD S3: Leverage the public SPI routine
Zheng Bao
2012-11-27
Remove AMD special case for LAPIC based udelay()
Patrick Georgi
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-11-20
Unify use of bool config variables
Stefan Reinauer
2012-11-20
Make sure only one udelay function is available
Stefan Reinauer
2012-11-02
AMD agesa: add enable cache at the end of disable_cache_as_ram
Siyuan Wang
2012-10-07
Remove chip.h files without config structure
Kyösti Mälkki
2012-08-22
Auto-declare chip_operations
Kyösti Mälkki
2012-08-09
Synchronize rdtsc instructions
Stefan Reinauer
2012-08-05
AMD S3: Remove the hardcoded volatile position
zbao
2012-08-04
Make the device tree available in the rom stage
Stefan Reinauer
2012-07-14
Remove useless file from building.
zbao
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-05-08
Clean up #ifs
Patrick Georgi
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-04-22
amd: Fix unused variable warning
Vikram Narayanan
2012-04-16
S3 code in coreboot public folder.
zbao
2012-04-12
S3 code in vendorcode folder.
zbao
2012-04-02
S3 code whitespaces changes.
zbao
2012-03-16
Rename AMD_AGESA to CPU_AMD_AGESA
Kyösti Mälkki
2012-03-16
Fix AMD Agesa leaking Kconfig
Kyösti Mälkki
2012-02-17
Remove whitespace.
Patrick Georgi
2012-02-16
AGESA F15: AGESA family15 model 00-0fh cpu wrapper
Kerry Sheh
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-11-01
Remove XIP_ROM_BASE
Patrick Georgi
2011-09-07
AMD F14 Rev C0 update
Kerry She
2011-08-06
Update AMD F14 Agesa to support Rev C0 cpus
efdesign98
2011-07-18
Add AMD Family 10 support to cpu folder
efdesign98
2011-06-28
Addition of Family12/SB900 wrapper code
efdesign98
2011-06-22
Move existing AMD Ffamily14 code to f14 folder
efdesign98
2011-06-22
Rename {CPU|NB|SB}/amd/*_wrapper folders
efdesign98