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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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Age
Commit message (
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Author
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-03-07
AMD: Uniformly define MSRs for TOP_MEM and TOP_MEM2
Kyösti Mälkki
2015-01-10
ACPI: Add acpi_is_wakeup_s3() for romstage
Kyösti Mälkki
2015-01-06
cpu: Drop print_ implementation from non-romcc boards
Stefan Reinauer
2014-11-14
AMD (K8/fam10): Rewrite CAR migration in post_cache_as_ram
Kyösti Mälkki
2014-06-25
Declare acpi_is_wakeup_early() only once
Kyösti Mälkki
2014-04-28
AMD: Add common header file for CAR setup
Kyösti Mälkki
2014-04-26
Rename coreboot_ram stage to ramstage
Furquan Shaikh
2014-04-09
cpu/amd/car: Use define MSR_MCFG_BASE rather than hardcoded value
Patrick Georgi
2014-01-22
AMD K8/fam10: Fix CBMEM on S3 resume
Kyösti Mälkki
2013-12-26
AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes
Kyösti Mälkki
2013-12-26
AMD boards (non-AGESA): Cleanup earlymtrr.c includes
Kyösti Mälkki
2013-12-02
amd/car/post_cache_as_ram: Switch stack in assembly rather than in C
Vladimir Serbinenko
2013-09-11
CBMEM: Drop parameter from cbmem_reinit()
Kyösti Mälkki
2013-09-11
CBMEM: Backup top_of_ram instead of cbmem_toc
Kyösti Mälkki
2013-07-11
cpu: Fix spelling
Martin Roth
2013-05-08
copy_and_run: drop boot_complete parameter
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-28
amdk8/amdfam10: Use CAR_GLOBAL for sysinfo
Patrick Georgi
2012-05-08
Clean up #ifs
Patrick Georgi
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-02-17
Remove whitespace.
Patrick Georgi
2011-11-01
Remove XIP_ROM_BASE
Patrick Georgi
2011-10-30
Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9
Rudolf Marek
2011-10-28
Get rid of AUTO_XIP_ROM_BASE
Patrick Georgi
2011-07-22
Update AMD SR5650 and SB700
efdesign98
2011-04-21
more ifdef -> if fixes
Stefan Reinauer
2011-04-14
Use symbolic names for some MTRR bits instead of numbers in CAR code
Stefan Reinauer
2011-02-10
According to AMD documentation, cache type WP should be used for
Scott Duplichan
2011-01-19
Revert r5902 to make code more readable again. At least three people like to
Stefan Reinauer
2010-11-22
1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC...
Rudolf Marek
2010-10-19
For AMD family 10h processors, msr c0010058 is always programmed
Scott Duplichan
2010-10-12
Reduce duplicate definition in CAR code.
Warren Turkal
2010-10-02
Add comments to make it clear why these two lines are written like that:
Uwe Hermann
2010-10-01
Factor out common CAR asm snippets.
Uwe Hermann
2010-10-01
Add missing parenthesis (trivial).
Uwe Hermann
2010-10-01
CAR simplifications, typos, readability improvements (trivial).
Uwe Hermann
2010-09-30
Various cosmetic and coding style fixes in CAR code (trivial).
Uwe Hermann
2010-09-30
Use existing, readable MTRR #defines instead of hardcoding numbers.
Uwe Hermann
2010-09-14
This patch corrects a coding error in the original implementation
Scott Duplichan
2010-09-13
CONFIG_MMCONF_SUPPORT is always defined. Fix build.
Myles Watson
2010-09-13
Move initialization of MMCONF BAR to cache_as_ram setup phase, in order
Arne Georg Gleditsch
2010-07-08
Fix all warnings in the tree
Stefan Reinauer
2010-06-07
replace outb -> port 0x80 with post_code() in some places.
Stefan Reinauer
2010-05-16
Following patch reworks car_disable into C. Tested, works here. I compared
Rudolf Marek
2010-05-14
Remove another set of includes from Fam10 romstages:
Patrick Georgi
2010-05-09
Move includes to where they are needed. This allows to simplify
Patrick Georgi
2010-04-09
drop unused files
Stefan Reinauer
2010-04-09
copy_and_run.c is not needed twice, and it is used on non-car too.
Stefan Reinauer
2010-04-09
thin out romcc epilogue and have it call copy_and_run as
Stefan Reinauer
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