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Some coreboot project code with my work
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amd
Age
Commit message (
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Author
2015-11-08
cpu/amd/family_10h-family_15h: Increase BSP stack size
Timothy Pearson
2015-11-08
cpu/amd/family_10h-family_15h: Add Family 15h microcode file
Timothy Pearson
2015-11-06
amd/00730F01: Add correct CPU model
Kyösti Mälkki
2015-11-06
AMD binaryPI: Fix include paths
Kyösti Mälkki
2015-11-03
cpu/amd/model_fxx: Backport PowerNow! core count fix from Family 10h
Timothy Pearson
2015-11-02
cpu/amd: Add initial AMD Family 15h support
Timothy Pearson
2015-11-02
cpu/amd/family_10h-family_15h: Use correct label for break state
Timothy Pearson
2015-11-02
cpu/amd: Move model_10xxx to family_10h-family_15h
Timothy Pearson
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-30
cpu: port amd/pi to 64bit
Stefan Reinauer
2015-10-30
AMD mainboards: Fix 64bit BiosCallOuts.c
Stefan Reinauer
2015-10-30
cpu/amd/model_fxx: Clear out unused / stale MTRRs in ramstage
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Enable FIDVID code on Socket F K8
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Backport APIC code and debug aids from Family 10h
Timothy Pearson
2015-10-30
cpu/amd/car: Honor BKDG recommendations for DisFillP in CAR
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Fix invalid P-state power values
Timothy Pearson
2015-10-30
cpu/amd/model_fxx: Add Socket F CPU ID mappings
Timothy Pearson
2015-10-27
cpu/amd/car: Add initial Suspend to RAM (S3) support
Timothy Pearson
2015-10-25
cpu/amd/car: Use standard integer types in post_cache_as_ram.c
Timothy Pearson
2015-10-25
cpu/amd/car: remove PRINTK_IN_CAR #define that was hardcoded to 1
Timothy Pearson
2015-10-24
cpu/amd: Add initial support for AMD Socket G34 processors
Timothy Pearson
2015-10-23
cpu/amd/model_10xxx: Clean up debugging statements
Timothy Pearson
2015-10-22
model_fxx/powernow: add dual core Socket F TDPs
Jonathan A. Kollasch
2015-10-16
cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS
Timothy Pearson
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-10-14
cpu/amd/microcode: Update parser to use stock microcode blobs
Audrey Pearson
2015-09-30
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-09-05
amd/geode_lx: make done_cache_as_ram_main global
Aaron Durbin
2015-09-04
x86: remove cpu_incs as romstage Make variable
Aaron Durbin
2015-08-14
cpu/amd/model_10xxx: Do not initialize SMM memory if SMM is disabled
Timothy Pearson
2015-08-13
amd: raminit sysinfo offset fix
Aaron Durbin
2015-08-07
amd/model_fxx: Move CPU microcode to 3rdparty/blobs
Stefan Reinauer
2015-08-07
amd/model_10xxx: Move CPU microcode to 3rdparty/blobs
Stefan Reinauer
2015-07-22
amd/model_fxx: set CPU_ADDR_BITS to 40 on all K8 machines
Jonathan A. Kollasch
2015-07-21
cpu: port amd/agesa to 64bit
Stefan Reinauer
2015-07-15
amd/model_fxx rev.F: emit P-states when no intermediates exist
Jonathan A. Kollasch
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2015-07-07
cpu/amd/model_10xxx: Determine single-link status of each CPU in _PSD generator
Timothy Pearson
2015-07-07
cpu/amd/car: Move AP stacks below the BSP stack to free up space
Timothy Pearson
2015-07-07
cpu/amd/car: Increase Family 10h CAR size limit to 128k
Timothy Pearson
2015-07-07
cpu/amd: Detect any conflicts between sysinfo and the stack region
Timothy Pearson
2015-06-13
AMD Merlin Falcon: Add CPU subdirectory files for new AMD processor
WANG Siyuan
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-06-02
cbfs: new API and better program loading
Aaron Durbin
2015-05-29
binaryPI: Hide use of acpi_slp_type
Kyösti Mälkki
2015-05-27
AGESA binaryPI: Drop XIP_ROM_BASE
Kyösti Mälkki
2015-05-27
AGESA: Reduce SPI use by 24kB for S3 support
Kyösti Mälkki
2015-05-27
AGESA: Separate HeapManager declarations from BiosCallOuts
Kyösti Mälkki
2015-05-27
AGESA: Split S3 backup in CBMEM
Kyösti Mälkki
2015-05-26
AGESA: Halt on S3 resume failure
Kyösti Mälkki
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