| Age | Commit message (Expand) | Author |
|---|
| 2012-02-20 | Fix MTRR TOM2 WB cache setup for AMD CPUs > revF. | Marc Jones |
| 2012-02-17 | Remove whitespace. | Patrick Georgi |
| 2012-02-16 | AGESA F15: AGESA family15 model 00-0fh cpu wrapper | Kerry Sheh |
| 2012-02-13 | AMD Geode cpus: apply un-written naming rules | Kyösti Mälkki |
| 2012-01-09 | Fix Geode GX2 + LX caching for tiny bootblock. | Nils Jacobs |
| 2011-12-26 | Fix Fam10 MMCONF_SUPPORT_DEFAULT setting. | Marc Jones |
| 2011-12-13 | Use MMCONF for all AMD family 10 CPUs. | Marc Jones |
| 2011-11-22 | k8 raminit: add workaround for erratum #181 on non-fam-f | Florian Zumbiehl |
| 2011-11-01 | remove trailing whitespace | Stefan Reinauer |
| 2011-11-01 | Remove XIP_ROM_BASE | Patrick Georgi |
| 2011-10-30 | Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9 | Rudolf Marek |
| 2011-10-28 | Get rid of AUTO_XIP_ROM_BASE | Patrick Georgi |
| 2011-10-17 | Fixes several issues with amd k8 SSDT P-state generation | Oskar Enoksson |
| 2011-10-11 | Fixed broken MTRR for >4GB memory on AMD K8 fam 0fh rev <=E | Oskar Enoksson |
| 2011-09-24 | Add AMD Family 10h PH-E0 support | QingPei Wang |
| 2011-09-07 | AMD F14 Rev C0 update | Kerry She |
| 2011-08-06 | Update AMD F14 Agesa to support Rev C0 cpus | efdesign98 |
| 2011-07-22 | Update AMD SR5650 and SB700 | efdesign98 |
| 2011-07-18 | Add AMD Family 10 support to cpu folder | efdesign98 |
| 2011-07-13 | Make AMD SMM SMP aware | Rudolf Marek |
| 2011-06-28 | Addition of Family12/SB900 wrapper code | efdesign98 |
| 2011-06-22 | Move existing AMD Ffamily14 code to f14 folder | efdesign98 |
| 2011-06-22 | Rename {CPU|NB|SB}/amd/*_wrapper folders | efdesign98 |
| 2011-05-15 | Cosmetic cleanup. | Scott Duplichan |
| 2011-05-15 | Correct the number of MCA error reporting banks cleared. | Scott Duplichan |
| 2011-05-15 | 1) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization. | Scott Duplichan |
| 2011-05-10 | Change read_option() to a macro that wraps some API uglyness | Patrick Georgi |
| 2011-04-21 | more ifdef -> if fixes. | Stefan Reinauer |
| 2011-04-21 | more ifdef -> if fixes | Stefan Reinauer |
| 2011-04-14 | Use symbolic names for some MTRR bits instead of numbers in CAR code | Stefan Reinauer |
| 2011-04-11 | Unify use of post_code | Alexandru Gagniuc |
| 2011-03-28 | Add AMD C32 support. | Zheng Bao |
| 2011-03-17 | Fix breaking the build after removing files in tthe previous checkin. | Marc Jones |
| 2011-03-04 | Add P-states for select Socket 754 processors. | Jonathan Kollasch |
| 2011-03-03 | Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code. | Jonathan Kollasch |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
