| Age | Commit message (Expand) | Author |
|---|
| 2011-06-22 | Move existing AMD Ffamily14 code to f14 folder | efdesign98 |
| 2011-06-22 | Rename {CPU|NB|SB}/amd/*_wrapper folders | efdesign98 |
| 2011-05-15 | Cosmetic cleanup. | Scott Duplichan |
| 2011-05-15 | Correct the number of MCA error reporting banks cleared. | Scott Duplichan |
| 2011-05-15 | 1) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization. | Scott Duplichan |
| 2011-05-10 | Change read_option() to a macro that wraps some API uglyness | Patrick Georgi |
| 2011-04-21 | more ifdef -> if fixes. | Stefan Reinauer |
| 2011-04-21 | more ifdef -> if fixes | Stefan Reinauer |
| 2011-04-14 | Use symbolic names for some MTRR bits instead of numbers in CAR code | Stefan Reinauer |
| 2011-04-11 | Unify use of post_code | Alexandru Gagniuc |
| 2011-03-28 | Add AMD C32 support. | Zheng Bao |
| 2011-03-17 | Fix breaking the build after removing files in tthe previous checkin. | Marc Jones |
| 2011-03-04 | Add P-states for select Socket 754 processors. | Jonathan Kollasch |
| 2011-03-03 | Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code. | Jonathan Kollasch |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-28 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-27 | Prepare for next patches (Improving BKDG implementation of P-states, | Xavi Drudis Ferran |
| 2011-02-26 | Make AMD Fam10h CPU microcode updates optional in Expert mode | Xavi Drudis Ferran |
| 2011-02-26 | It adds support for automatic PSS object generation for AMD pre fam Fh CPU. T... | Rudolf Marek |
| 2011-02-24 | Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS | Josef Kellermann |
| 2011-02-14 | Add AMD cpu wrapper code. Patch 4 of 8. | Frank Vibrans |
| 2011-02-10 | According to AMD documentation, cache type WP should be used for | Scott Duplichan |
| 2011-02-10 | Implemented workaround for erratum 169, obsoleting erratum 131. | Alexandru Gagniuc |
| 2011-02-10 | Fix a potential system hang by handling AMD Model F Erratum 89 | Josef Kellermann |
| 2011-01-19 | Revert r5902 to make code more readable again. At least three people like to | Stefan Reinauer |
| 2011-01-12 | drop unused files | Stefan Reinauer |
| 2011-01-01 | Add AMD SB800 southbridge CIMx code. | Kerry She |
| 2010-12-30 | Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code | Nils Jacobs |
| 2010-12-26 | Remove dead and unused Geode GX2 code | Nils Jacobs |
| 2010-12-26 | Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names | Nils Jacobs |
