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path: root/src/cpu/intel/car
AgeCommit message (Expand)Author
2019-08-26intel/car: Use common TS_START_ROMSTAGEKyösti Mälkki
2019-08-26lib/bootblock: Add simplified entry with basetimeKyösti Mälkki
2019-08-26soc/intel: Use common romstage codeKyösti Mälkki
2019-08-22arch/x86: Add <arch/romstage.h>Kyösti Mälkki
2019-08-21cpu/intel/car: Make stack guards more useful on C_ENV_BOOTBLOCKArthur Heymans
2019-08-18cpu/intel: Enter romstage without BISTKyösti Mälkki
2019-08-15cpu/x86/smm: Promote smm_memory_map()Kyösti Mälkki
2019-08-15arch/x86: Add postcar_frame_common_mtrrs()Kyösti Mälkki
2019-08-15cpu/intel: Refactor platform_enter_postcar()Kyösti Mälkki
2019-06-21cpu: Add missing #include <commonlib/helpers.h>Elyes HAOUAS
2019-04-21cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-02-10cpu/intel/car/*/cache_as_ram.S: Add brackets around operandArthur Heymans
2019-01-17cpu/intel/car: Remove unneeded white spaceElyes HAOUAS
2019-01-15cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setupArthur Heymans
2019-01-14cpu/intel/car/non-evict: Update microcode in CAR setupArthur Heymans
2019-01-13arch/x86: Drop Kconfig AP_SIPI_VECTORKyösti Mälkki
2019-01-13cpu/intel/car/p4: Update microcode in CAR setupArthur Heymans
2019-01-09cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans
2019-01-08cpu/intel/car/bootblock.c: Report BIST failuresArthur Heymans
2019-01-08cpu/intel/car: Enable use of C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-01-08cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCKKyösti Mälkki
2018-12-30arch/x86: Add CAR stack location symbolsKyösti Mälkki
2018-12-30cpu/intel/car: Drop remains of setup_stack_and_mtrrs()Kyösti Mälkki
2018-12-28soc/intel: Drop romstage_after_car()Kyösti Mälkki
2018-12-24car/non-evict/exit_car.S: Use tabs instead of white spacesElyes HAOUAS
2018-12-21car/non-evict/cache_as_ram.S: Use tabs instead of spacesArthur Heymans
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-10-04cpu/intel/car: Fix typoElyes HAOUAS
2018-09-18cpu/*/car: fix ancient URL explaining XIP range run-time calculationStefan Tauner
2018-08-13cpu/intel/car: Align the stack to 16 bytes before romstage_mainArthur Heymans
2018-06-27cpu/intel/p4-netburst: skip caching rom on model_fxxArthur Heymans
2018-06-27x86/car: Replace reference of copy_and_run locationKyösti Mälkki
2018-06-17nb/intel/i440bx: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-17cpu/intel/car/p3: Use variable MTRR countKyösti Mälkki
2018-06-17cpu/intel/slot_1: Switch to different CAR setupKyösti Mälkki
2018-06-17cpu/intel/car: Remove obsolete filesKyösti Mälkki
2018-06-05cpu/intel/car/non-evict: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-05cpu/intel/car/core2: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/core2: Prepare for POSTCAR_STAGE supportArthur Heymans
2018-06-02cpu/intel/car: Prepare for some POSTCAR_STAGE supportKyösti Mälkki
2018-06-02aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INITKyösti Mälkki
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2017-09-12cpu/intel/car/cache_as_ram.inc: Fix long standing issuesKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Remove unused codeKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Remove broken HT codeKeith Hui
2017-09-08intel/car: Fix stack guard placementKyösti Mälkki
2017-06-28cpu/*: Add whitespace around '<<'Elyes HAOUAS
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel