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path: root/src/cpu/intel/car
AgeCommit message (Expand)Author
2018-10-04cpu/intel/car: Fix typoElyes HAOUAS
2018-09-18cpu/*/car: fix ancient URL explaining XIP range run-time calculationStefan Tauner
2018-08-13cpu/intel/car: Align the stack to 16 bytes before romstage_mainArthur Heymans
2018-06-27cpu/intel/p4-netburst: skip caching rom on model_fxxArthur Heymans
2018-06-27x86/car: Replace reference of copy_and_run locationKyösti Mälkki
2018-06-17nb/intel/i440bx: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-17cpu/intel/car/p3: Use variable MTRR countKyösti Mälkki
2018-06-17cpu/intel/slot_1: Switch to different CAR setupKyösti Mälkki
2018-06-17cpu/intel/car: Remove obsolete filesKyösti Mälkki
2018-06-05cpu/intel/car/non-evict: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-05cpu/intel/car/core2: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/core2: Prepare for POSTCAR_STAGE supportArthur Heymans
2018-06-02cpu/intel/car: Prepare for some POSTCAR_STAGE supportKyösti Mälkki
2018-06-02aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INITKyösti Mälkki
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2017-09-12cpu/intel/car/cache_as_ram.inc: Fix long standing issuesKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Remove unused codeKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Remove broken HT codeKeith Hui
2017-09-08intel/car: Fix stack guard placementKyösti Mälkki
2017-06-28cpu/*: Add whitespace around '<<'Elyes HAOUAS
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2016-12-11intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2016-11-20intel car: Move pre-ram stack guard lowerKyösti Mälkki
2016-11-11intel cache-as-ram: Unify stack setupKyösti Mälkki
2016-11-11intel post-car: Separate files for setup_stack_and_mtrrs()Kyösti Mälkki
2016-11-08intel post-car: Split legacy socketsKyösti Mälkki
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-07-26intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki
2016-07-22intel car: Unify postcodesKyösti Mälkki
2016-07-22intel car: Unify whitespace and comment fixesKyösti Mälkki
2016-07-22intel car: Remove guard on XIP_ROM_SIZEKyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-22intel cache-as-ram: Fix comment about MTRRsKyösti Mälkki
2016-06-21intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-21intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-18intel: Fix romstage main() with asmlinkageKyösti Mälkki
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2013-07-10usbdebug: Put ehci_debug_info in CAR_GLOBALKyösti Mälkki
2013-05-08copy_and_run: drop boot_complete parameterStefan Reinauer
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
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