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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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Age
Commit message (
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Author
2018-12-28
soc/intel: Drop romstage_after_car()
Kyösti Mälkki
2018-12-24
car/non-evict/exit_car.S: Use tabs instead of white spaces
Elyes HAOUAS
2018-12-21
car/non-evict/cache_as_ram.S: Use tabs instead of spaces
Arthur Heymans
2018-11-12
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-10-04
cpu/intel/car: Fix typo
Elyes HAOUAS
2018-09-18
cpu/*/car: fix ancient URL explaining XIP range run-time calculation
Stefan Tauner
2018-08-13
cpu/intel/car: Align the stack to 16 bytes before romstage_main
Arthur Heymans
2018-06-27
cpu/intel/p4-netburst: skip caching rom on model_fxx
Arthur Heymans
2018-06-27
x86/car: Replace reference of copy_and_run location
Kyösti Mälkki
2018-06-17
nb/intel/i440bx: Switch to POSTCAR_STAGE
Kyösti Mälkki
2018-06-17
cpu/intel/car/p3: Use variable MTRR count
Kyösti Mälkki
2018-06-17
cpu/intel/slot_1: Switch to different CAR setup
Kyösti Mälkki
2018-06-17
cpu/intel/car: Remove obsolete files
Kyösti Mälkki
2018-06-05
cpu/intel/car/non-evict: Improve a few things
Arthur Heymans
2018-06-05
cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support
Arthur Heymans
2018-06-05
cpu/intel/car/core2: Improve a few things
Arthur Heymans
2018-06-05
cpu/intel/car/core2: Prepare for POSTCAR_STAGE support
Arthur Heymans
2018-06-02
cpu/intel/car: Prepare for some POSTCAR_STAGE support
Kyösti Mälkki
2018-06-02
aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT
Kyösti Mälkki
2018-05-31
{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate
Nico Huber
2017-09-12
cpu/intel/car/cache_as_ram.inc: Fix long standing issues
Keith Hui
2017-09-12
cpu/intel/car/cache_as_ram.inc: Remove unused code
Keith Hui
2017-09-12
cpu/intel/car/cache_as_ram.inc: Remove broken HT code
Keith Hui
2017-09-08
intel/car: Fix stack guard placement
Kyösti Mälkki
2017-06-28
cpu/*: Add whitespace around '<<'
Elyes HAOUAS
2017-06-07
Use more secure HTTPS URLs for coreboot sites
Paul Menzel
2017-03-16
cpu/intel: Fix the spacing issues
Lee Leahy
2017-03-16
cpu/intel: Indent with tabs
Lee Leahy
2016-12-11
intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup
Kyösti Mälkki
2016-11-20
intel car: Move pre-ram stack guard lower
Kyösti Mälkki
2016-11-11
intel cache-as-ram: Unify stack setup
Kyösti Mälkki
2016-11-11
intel post-car: Separate files for setup_stack_and_mtrrs()
Kyösti Mälkki
2016-11-08
intel post-car: Split legacy sockets
Kyösti Mälkki
2016-09-04
src/cpu: Improve code formatting
Elyes HAOUAS
2016-08-23
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-07-26
intel car: Use MTRR WRPROT type for XIP cache
Kyösti Mälkki
2016-07-22
intel car: Unify postcodes
Kyösti Mälkki
2016-07-22
intel car: Unify whitespace and comment fixes
Kyösti Mälkki
2016-07-22
intel car: Remove guard on XIP_ROM_SIZE
Kyösti Mälkki
2016-06-22
Ignore RAMTOP for MTRRs
Kyösti Mälkki
2016-06-22
intel cache-as-ram: Fix comment about MTRRs
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-18
intel: Fix romstage main() with asmlinkage
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-10-19
x86 romstage: Move stack just below RAMTOP
Kyösti Mälkki
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