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Some coreboot project code with my work
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car
Age
Commit message (
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Author
2018-05-31
{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate
Nico Huber
2017-09-12
cpu/intel/car/cache_as_ram.inc: Fix long standing issues
Keith Hui
2017-09-12
cpu/intel/car/cache_as_ram.inc: Remove unused code
Keith Hui
2017-09-12
cpu/intel/car/cache_as_ram.inc: Remove broken HT code
Keith Hui
2017-09-08
intel/car: Fix stack guard placement
Kyösti Mälkki
2017-06-28
cpu/*: Add whitespace around '<<'
Elyes HAOUAS
2017-06-07
Use more secure HTTPS URLs for coreboot sites
Paul Menzel
2017-03-16
cpu/intel: Fix the spacing issues
Lee Leahy
2017-03-16
cpu/intel: Indent with tabs
Lee Leahy
2016-12-11
intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup
Kyösti Mälkki
2016-11-20
intel car: Move pre-ram stack guard lower
Kyösti Mälkki
2016-11-11
intel cache-as-ram: Unify stack setup
Kyösti Mälkki
2016-11-11
intel post-car: Separate files for setup_stack_and_mtrrs()
Kyösti Mälkki
2016-11-08
intel post-car: Split legacy sockets
Kyösti Mälkki
2016-09-04
src/cpu: Improve code formatting
Elyes HAOUAS
2016-08-23
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-07-26
intel car: Use MTRR WRPROT type for XIP cache
Kyösti Mälkki
2016-07-22
intel car: Unify postcodes
Kyösti Mälkki
2016-07-22
intel car: Unify whitespace and comment fixes
Kyösti Mälkki
2016-07-22
intel car: Remove guard on XIP_ROM_SIZE
Kyösti Mälkki
2016-06-22
Ignore RAMTOP for MTRRs
Kyösti Mälkki
2016-06-22
intel cache-as-ram: Fix comment about MTRRs
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-21
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-06-18
intel: Fix romstage main() with asmlinkage
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-10-19
x86 romstage: Move stack just below RAMTOP
Kyösti Mälkki
2014-01-15
Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR
Kyösti Mälkki
2013-07-10
usbdebug: Put ehci_debug_info in CAR_GLOBAL
Kyösti Mälkki
2013-05-08
copy_and_run: drop boot_complete parameter
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-08-03
Intel CPUs: Fix counting of CPU cores
Kyösti Mälkki
2012-07-04
Intel cpus: Extend cache to cover complete Flash Device
Kyösti Mälkki
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-03-31
Whitespace fixes
Patrick Georgi
2012-03-31
Intel cpus: get MAXPHYADDR at runtime for new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: add hyper-threading CPU support to new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: improve CPU compatibility of new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: apply some good programming practices in new CAR
Kyösti Mälkki
2012-03-31
Intel cpus: cache actual size of the Flash ROM device
Kyösti Mälkki
2012-03-31
Intel cpus: copy model_6ex CAR code
Kyösti Mälkki
2011-11-01
Remove XIP_ROM_BASE
Patrick Georgi
2011-10-30
Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9
Rudolf Marek
2011-10-28
Get rid of AUTO_XIP_ROM_BASE
Patrick Georgi
2011-04-21
more ifdef -> if fixes
Stefan Reinauer
2011-04-14
Use symbolic names for some MTRR bits instead of numbers in CAR code
Stefan Reinauer
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