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path: root/src/cpu/intel/haswell/romstage.c
AgeCommit message (Expand)Author
2019-03-27Move calls to quick_ram_check() before CBMEM initKyösti Mälkki
2019-03-20src: Use 'include <string.h>' when appropriateElyes HAOUAS
2019-03-16src: Drop unused '#include <halt.h>'Elyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-06src: Drop unused include <arch/acpi.h>Elyes HAOUAS
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
2019-02-12postcar: Make more use of postcar_frame_add_romcache()Nico Huber
2019-01-09cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans
2019-01-03nb/intel/haswell: Add support for PEGTristan Corrick
2018-11-16src: Remove unneeded include <cbfs.h>Elyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-08-13src: Get rid of non-local header treated as localElyes HAOUAS
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-06-14cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans
2018-06-05cpu/intel/haswell: Switch to POSTCAR_STAGEArthur Heymans
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
2017-10-04chromeec: Remove checks for EC in RODaisuke Nojiri
2017-06-28cpu/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-16haswell: add CBMEM_MEMINFO table when initing RAMMatt DeVillier
2017-03-16cpu/intel: Fix brace issues detected by checkpatch.plLee Leahy
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2016-12-06CPU: Declare cpu_phys_address_size() for all archKyösti Mälkki
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-18intel post-car: Increase stacktop alignmentKyösti Mälkki
2016-10-31lib/prog_loaders: use common ramstage_cache_invalid()Aaron Durbin
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-23intel/haswell post-car: Minor fix on MTRR settingKyösti Mälkki
2016-07-23intel/haswell: Add asmlinkage for romstage_after_car()Kyösti Mälkki
2016-07-10intel post-car: Consolidate choose_top_of_stack()Kyösti Mälkki
2016-06-29intel/haswell: No need for ACPI S3 resume backupKyösti Mälkki
2016-06-29intel romstage: Use run_ramstage()Kyösti Mälkki
2016-06-22ACPI S3: Add common recovery codeKyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-17Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki
2016-06-17Fix some cbmem.h includesKyösti Mälkki
2016-02-26tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-06-09stage_cache: use cbmem init hooksAaron Durbin
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-05haswell: Link stage_cache_external_region into ramstage, tooSol Boucher
2015-04-22coreboot: common stage cacheAaron Durbin
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
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