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path: root/src/cpu/intel/haswell
AgeCommit message (Expand)Author
2018-12-28arch/x86: SSE2 implies SSE supportKyösti Mälkki
2018-12-20cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier
2018-12-18cpu: Remove unneeded include <pc80/mc146818rtc.h>Elyes HAOUAS
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-11-30cpu/intel/common: Use a common acpi/cpu.asl fileArthur Heymans
2018-11-30cpu/intel/haswell: Rework acpi/cpu.aslArthur Heymans
2018-11-16src: Remove unneeded include <cbfs.h>Elyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-01cpu/intel/haswell: Only change the slow ramp rate for ULT CPUsTristan Corrick
2018-11-01cpu/intel/haswell: Allow use of TSC for the monotonic timerTristan Corrick
2018-11-01cpu/intel/haswell: Add the CPUID for Haswell C0 CPUsTristan Corrick
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-08-13src: Get rid of non-local header treated as localElyes HAOUAS
2018-08-09src/cpu: Fix typoElyes HAOUAS
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-07-24cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans
2018-06-14cpu/intel/haswell: Use the common intel romstage_main functionArthur Heymans
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-05cpu/intel/haswell: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-04-30cpu/intel: Get rid of device_tElyes HAOUAS
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-02-06cpu/intel/haswell: Don't select PARALLEL_CPU_INITArthur Heymans
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-10-04chromeec: Remove checks for EC in RODaisuke Nojiri
2017-09-11cpu/x86/mp_init: remove adjust_cpu_apic_entry()Aaron Durbin
2017-07-06cpu/intel/haswell: Fix undefined behaviorRyan Salsamendi
2017-06-28cpu/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-28cpu/*: Add whitespace around '<<'Elyes HAOUAS
2017-06-16haswell: add CBMEM_MEMINFO table when initing RAMMatt DeVillier
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
2017-03-16cpu/intel: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/intel: Fix brace issues detected by checkpatch.plLee Leahy
2017-03-16cpu/intel: Add int to unsignedLee Leahy
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2016-12-27cpu/intel/common: Add/Use common function to set virtualizationMatt DeVillier
2016-12-06CPU: Declare cpu_phys_address_size() for all archKyösti Mälkki
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-18intel post-car: Increase stacktop alignmentKyösti Mälkki
2016-11-11intel cache-as-ram: Unify stack setupKyösti Mälkki
2016-10-31lib/prog_loaders: use common ramstage_cache_invalid()Aaron Durbin
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS