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path: root/src/cpu/intel/model_6ex
AgeCommit message (Expand)Author
2020-04-04src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons
2019-11-03cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki
2019-09-24intel/cpu: Switch older models to TSC_MONOTONIC_TIMERKyösti Mälkki
2019-09-19cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASEKyösti Mälkki
2019-09-10AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth
2019-07-09cpu/intel: Drop SMM_TSEG conditionalKyösti Mälkki
2019-07-01Use 3rdparty/intel-microcodeArthur Heymans
2019-03-20src: Use 'include <string.h>' when appropriateElyes HAOUAS
2019-01-24cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRRArthur Heymans
2019-01-23nb/intel/i945: Use parallel MP initArthur Heymans
2018-12-20cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier
2018-12-03nb/intel/i945: Use common SMM_TSEG codeArthur Heymans
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-06-17cpu/intel/car: Remove obsolete filesKyösti Mälkki
2017-11-30intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
2017-03-16cpu/intel: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2017-03-09cpu/intel/model_6{e,f}x: Unify init filesPaul Menzel
2016-12-27cpu/intel/common: Add/Use common function to set virtualizationMatt DeVillier
2016-12-11intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2016-11-11intel cache-as-ram: Unify stack setupKyösti Mälkki
2016-10-09cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4EArthur Heymans
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-26intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki
2016-07-22intel car: Unify postcodesKyösti Mälkki
2016-07-22intel car: Unify whitespace and comment fixesKyösti Mälkki
2016-07-22intel car: Remove guard on XIP_ROM_SIZEKyösti Mälkki
2016-06-22Ignore RAMTOP for MTRRsKyösti Mälkki
2016-06-22intel cache-as-ram: Fix comment about MTRRsKyösti Mälkki
2016-06-21intel/model_6ex: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-02-28cpu/intel: (non-FSP) Remove microcode updates from treeAlexandru Gagniuc
2015-02-28cpu/intel (non-FSP): Use microcode from blobs repositoryAlexandru Gagniuc
2015-01-27vboot2: add verstageStefan Reinauer
2014-10-27{arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
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