coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-11-25	Drop superfluous C_ENVIRONMENT_BOOTBLOCK checks	Arthur Heymans
2019-11-03	cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE	Kyösti Mälkki
2019-11-02	cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.	Arthur Heymans
2019-09-24	intel/cpu: Switch older models to TSC_MONOTONIC_TIMER	Kyösti Mälkki
2019-09-19	cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE	Kyösti Mälkki
2016-12-27	cpu/intel/common: Add/Use common function to set virtualization	Matt DeVillier
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-05-06	Introduce stage-specific architecture for coreboot	Furquan Shaikh
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2014-01-16	cpu/intel: Make all Intel CPUs load microcode from CBFS	Alexandru Gagniuc
2012-08-09	Synchronize rdtsc instructions	Stefan Reinauer
2012-07-31	Revert "Use broadcast SIPI to startup siblings"	Sven Schnelle
2012-07-02	Use broadcast SIPI to startup siblings	Sven Schnelle
2012-02-10	Intel cpus: apply un-written naming rules	Kyösti Mälkki
2010-04-13	fix timer choice in Kconfig. HAVE_INIT_TIMER is selected correctly, no need to	Stefan Reinauer
2010-02-25	HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case.	Stefan Reinauer
2009-08-12	Kconfig!	Patrick Georgi