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path: root/src/cpu/intel/model_6fx
AgeCommit message (Expand)Author
2020-04-04src/cpu: Use SPDX for GPL-2.0-only filesAngel Pons
2019-11-25Drop superfluous C_ENVIRONMENT_BOOTBLOCK checksArthur Heymans
2019-11-03cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki
2019-11-02cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.Arthur Heymans
2019-09-24intel/cpu: Switch older models to TSC_MONOTONIC_TIMERKyösti Mälkki
2019-09-19cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASEKyösti Mälkki
2019-09-10AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth
2019-07-09cpu/intel: Drop SMM_TSEG conditionalKyösti Mälkki
2019-07-01Use 3rdparty/intel-microcodeArthur Heymans
2019-03-20src: Use 'include <string.h>' when appropriateElyes HAOUAS
2019-01-24cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRRArthur Heymans
2019-01-23nb/intel/x4x: Use parallel MP initArthur Heymans
2019-01-23nb/intel/gm45: Use parallel MP initArthur Heymans
2018-12-20cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()Matt DeVillier
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2017-11-30intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-03-16cpu/intel: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2017-03-09cpu/intel/model_6{e,f}x: Unify init filesPaul Menzel
2017-01-10cpu/intel/model_6fx: Add Conroe-L to cpu_device_id listArthur Heymans
2016-12-27cpu/intel/common: Add/Use common function to set virtualizationMatt DeVillier
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-09-30cpu: microcode: Use microcode stored in binary formatAlexandru Gagniuc
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-02-28cpu/intel: (non-FSP) Remove microcode updates from treeAlexandru Gagniuc
2015-02-28cpu/intel (non-FSP): Use microcode from blobs repositoryAlexandru Gagniuc
2015-01-27vboot2: add verstageStefan Reinauer
2014-10-27{arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-02-12PCI: Drop includes under cpuKyösti Mälkki
2014-01-16cpu/intel: Remove dummy terminators from microcode blobsAlexandru Gagniuc
2014-01-16cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc
2013-07-11usbdebug: Drop old includesKyösti Mälkki
2013-06-14usbdebug: Drop temporary disables of log outputKyösti Mälkki
2013-03-21Intel: Update CPU microcode for 6fx CPUsStefan Reinauer
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-08-09Synchronize rdtsc instructionsStefan Reinauer