coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-01-24	cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR	Arthur Heymans
2019-01-23	nb/intel/x4x: Use parallel MP init	Arthur Heymans
2019-01-23	nb/intel/gm45: Use parallel MP init	Arthur Heymans
2018-12-20	cpu/intel/common: decouple IA32_FEATURE_CONTROL lock from set_vmx()	Matt DeVillier
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-05	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	Elyes HAOUAS
2018-07-30	nb/intel/gm45: Use common code for SMM in TSEG	Arthur Heymans
2017-11-30	intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)	Elyes HAOUAS
2017-11-23	Constify struct cpu_device_id instances	Jonathan Neuschäfer
2017-03-16	cpu/intel: Wrap lines at 80 columns	Lee Leahy
2017-03-16	cpu/intel: Fix the spacing issues	Lee Leahy
2017-03-16	cpu/intel: Indent with tabs	Lee Leahy
2017-03-09	cpu/intel/model_6{e,f}x: Unify init files	Paul Menzel
2017-01-10	cpu/intel/model_6fx: Add Conroe-L to cpu_device_id list	Arthur Heymans
2016-12-27	cpu/intel/common: Add/Use common function to set virtualization	Matt DeVillier
2016-09-04	src/cpu: Improve code formatting	Elyes HAOUAS
2016-08-23	src/cpu: Capitalize CPU, APIC and IOAPIC typo fix	Elyes HAOUAS
2016-07-31	src/cpu: Capitalize CPU	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-30	cpu: microcode: Use microcode stored in binary format	Alexandru Gagniuc
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-05	3rdparty: move to 3rdparty/blobs	Patrick Georgi
2015-05-05	3rdparty: Move to blobs	Patrick Georgi
2015-02-28	cpu/intel: (non-FSP) Remove microcode updates from tree	Alexandru Gagniuc
2015-02-28	cpu/intel (non-FSP): Use microcode from blobs repository	Alexandru Gagniuc
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-10-27	{arch,cpu,drivers,ec}: Don't hide pointers behind typedefs	Edward O'Callaghan
2014-07-08	cpu: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-05-06	Introduce stage-specific architecture for coreboot	Furquan Shaikh
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2014-02-12	PCI: Drop includes under cpu	Kyösti Mälkki
2014-01-16	cpu/intel: Remove dummy terminators from microcode blobs	Alexandru Gagniuc
2014-01-16	cpu/intel: Make all Intel CPUs load microcode from CBFS	Alexandru Gagniuc
2013-07-11	usbdebug: Drop old includes	Kyösti Mälkki
2013-06-14	usbdebug: Drop temporary disables of log output	Kyösti Mälkki
2013-03-21	Intel: Update CPU microcode for 6fx CPUs	Stefan Reinauer
2013-02-09	speedstep: Deduplicate some MSR identifiers	Patrick Georgi
2012-11-27	Get rid of drivers class	Patrick Georgi
2012-11-01	Merge cpu/intel/acpi.h into cpu/intel/speedstep.h	Nico Huber
2012-08-09	Synchronize rdtsc instructions	Stefan Reinauer
2012-07-31	Revert "Use broadcast SIPI to startup siblings"	Sven Schnelle
2012-07-04	Intel cpus: delete dead CAR code and whitespace fixes	Kyösti Mälkki
2012-07-04	Intel cpus: use CPU_ADDR_BITS from Kconfig during CAR	Kyösti Mälkki
2012-07-02	Use broadcast SIPI to startup siblings	Sven Schnelle
2012-06-19	Enable Intel PECI on Model 6fx CPUs	Sven Schnelle
2012-04-25	Replace cache control magic numbers with symbols	Patrick Georgi
2012-02-16	Intel cpus: use CPU_PHYSMASK_HI define in CAR	Kyösti Mälkki
2012-02-10	Intel cpus: apply un-written naming rules	Kyösti Mälkki
2012-01-10	MTRR: get physical address size from CPUID	Sven Schnelle
2011-11-01	Remove XIP_ROM_BASE	Patrick Georgi