coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2015-09-04	x86: remove cpu_incs as romstage Make variable	Aaron Durbin
2015-05-04	cpu: get rid of socket source code	Stefan Reinauer
2014-12-30	intel CAR: Fix DCACHE_RAM_BASE for old sockets	Kyösti Mälkki
2014-07-05	Drop redundant select CACHE_AS_RAM	Kyösti Mälkki
2012-10-07	Remove chip.h files without config structure	Kyösti Mälkki
2012-08-22	Auto-declare chip_operations	Kyösti Mälkki
2010-12-08	Move "select CACHE_AS_RAM" lines from boards into CPU socket.	Uwe Hermann
2010-09-30	Rename build system variables to be more intuitive, and	Patrick Georgi
2010-08-30	mPGA479M Sockets can take Intel Mobile Celeron.	Andreas Schultz
2010-04-11	The ADL855PC was never confirmed working (in fact it's pretty sure that code	Stefan Reinauer
2010-02-07	newconfig is no more.	Patrick Georgi
2009-10-17	Remove some more instances of including previous empty x86/fpu/Makefile.inc	Peter Stuge
2009-10-16	Drop empty cpu/x86/{mmx,sse}/{Config.lb,Makefile.inc} and remove references	Peter Stuge
2009-10-09	Remove default n statements to simplify .config and ldoptions files.	Myles Watson
2009-10-08	Set MMX and SSE where needed. Note that many boards don't even bother	Ronald G. Minnich
2009-09-29	More consistent use of "default n" and "select XYZ" in	Patrick Georgi
2009-09-25	some progress on kconfig:	Patrick Georgi
2006-11-05	Use the canonical name of the vendors/devices and the	Uwe Hermann
2004-11-10	adl855pc support	Ronald G. Minnich
2004-11-04	- Update abuild.sh so it will rebuild successfull builds	Eric Biederman
2004-10-27	- Bug fixes to the P-III support	Eric Biederman